unicorn/qemu/target
Peter Maydell 6713884243
target/arm: Handle SPSEL and current stack being out of sync in MSP/PSP reads
For v8M it is possible for the CONTROL.SPSEL bit value and the
current stack to be out of sync. This means we need to update
the checks used in reads and writes of the PSP and MSP special
registers to use v7m_using_psp() rather than directly checking
the SPSEL bit in the control register.

Backports commit 1169d3aa5b19adca9384d954d80e1f48da388284 from qemu
2018-03-05 13:48:30 -05:00
..
arm target/arm: Handle SPSEL and current stack being out of sync in MSP/PSP reads 2018-03-05 13:48:30 -05:00
i386 i386: Add EPYC-IBPB CPU model 2018-03-05 13:48:30 -05:00
m68k qom: Introduce CPUClass.tcg_initialize 2018-03-05 09:49:26 -05:00
mips qom: Introduce CPUClass.tcg_initialize 2018-03-05 09:49:26 -05:00
sparc qom: Introduce CPUClass.tcg_initialize 2018-03-05 09:49:26 -05:00