Richard Henderson 7a1750d691 target/arm: Remove unnecessary range check for VSHL ... In 1dc8425e551, while converting to gvec, I added an extra range check against the shift count. This was unnecessary because the encoding of the shift count produces 0 to the element size - 1. Backports commit 2f27c5244db300387f15d9ffa5067a204ffd625d from qemu		2020-05-15 20:42:12 -04:00
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arm	target/arm: Remove unnecessary range check for VSHL	2020-05-15 20:42:12 -04:00
i386	various: Remove suspicious '\' character outside of #define in C code	2020-04-30 07:31:45 -04:00
m68k	m68k: Fix regression causing Single-Step via GDB/RSP to not single step	2020-03-21 12:15:08 -04:00
mips	target/mips: Fix loongson multimedia condition instructions	2020-04-30 07:14:10 -04:00
riscv	target/riscv: Add a sifive-e34 cpu type	2020-04-30 21:08:10 -04:00
sparc	target/sparc: sun4u Invert Endian TTE bit	2020-01-07 19:21:30 -05:00