Peter Maydell 7a293cd7cc target-arm: Simplify insn_crosses_page() ... Recent changes have left insn_crosses_page() more complicated than it needed to be: * it's only called from thumb_tr_translate_insn() so we know for certain that we're looking at a Thumb insn * the caller's check for dc->pc >= dc->next_page_start - 3 means that dc->pc can't possibly be 4 aligned, so there's no need to check that (the check was partly there to ensure that we didn't treat an ARM insn as Thumb, I think) * we now have thumb_insn_is_16bit() which lets us do a precise check of the length of the next insn, rather than opencoding an inaccurate check Simplify it down to just loading the first half of the insn and calling thumb_insn_is_16bit() on it. Backports commit 5b8d7289e9e92a0d7bcecb93cd189e245fef10cd from qemu		2018-03-05 03:44:54 -05:00
..
arm	target-arm: Simplify insn_crosses_page()	2018-03-05 03:44:54 -05:00
i386	tcg: remove addr argument from lookup_tb_ptr	2018-03-05 02:16:34 -05:00
m68k	target/m68k: Switch fpu_rom from make_floatx80() to make_floatx80_init()	2018-03-04 23:05:01 -05:00
mips	tcg: remove addr argument from lookup_tb_ptr	2018-03-05 02:16:34 -05:00
sparc	sparc: Fix typedef clash	2018-03-04 23:05:50 -05:00