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The insns in the ARMv8.1-Atomics are added to the existing load/store exclusive and load/store reg opcode spaces. Rearrange the top-level decoders for these to accomodate. The Atomics insns themselves still generate Unallocated. Backports commit 68412d2ecedbab5a43b0d346cddb27e00d724aff from qemu |
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m68k | ||
mips | ||
sparc |