unicorn/qemu/target
Paolo Bonzini 7dd4afd8d9
target/i386: trap on instructions longer than >15 bytes
Besides being more correct, arbitrarily long instruction allow the
generation of a translation block that spans three pages. This
confuses the generator and even allows ring 3 code to poison the
translation block cache and inject code into other processes that are
in guest ring 3.

This is an improved (and more invasive) fix for commit 30663fd ("tcg/i386:
Check the size of instruction being translated", 2017-03-24). In addition
to being more precise (and generating the right exception, which is #GP
rather than #UD), it distinguishes better between page faults and too long
instructions, as shown by this test case:

int main()
{
char *x = mmap(NULL, 8192, PROT_READ|PROT_WRITE|PROT_EXEC,
MAP_PRIVATE|MAP_ANON, -1, 0);
memset(x, 0x66, 4096);
x[4096] = 0x90;
x[4097] = 0xc3;
char *i = x + 4096 - 15;
mprotect(x + 4096, 4096, PROT_READ|PROT_WRITE);
((void(*)(void)) i) ();
}

... which produces a #GP without the mprotect, and a #PF with it.

Backports commit b066c5375737ad0d630196dab2a2b329515a1d00 from qemu
2018-03-05 04:12:28 -05:00
..
arm target/arm: Implement SG instruction corner cases 2018-03-05 03:47:20 -05:00
i386 target/i386: trap on instructions longer than >15 bytes 2018-03-05 04:12:28 -05:00
m68k target/m68k: Switch fpu_rom from make_floatx80() to make_floatx80_init() 2018-03-04 23:05:01 -05:00
mips tcg: remove addr argument from lookup_tb_ptr 2018-03-05 02:16:34 -05:00
sparc sparc: Fix typedef clash 2018-03-04 23:05:50 -05:00