Fabien Chouteau 7e6d37b51d RISC-V: fix single stepping over ret and other branching instructions ... This patch introduces wrappers around the tcg_gen_exit_tb() and tcg_gen_lookup_and_goto_ptr() functions that handle single stepping, i.e. call gen_exception_debug() when single stepping is enabled. Theses functions are then used instead of the originals, bringing single stepping handling in places where it was previously ignored such as jalr and system branch instructions (ecall, mret, sret, etc.). Backports commit 6e2716d8ca4edf3597307accef7af36e8ad966eb from qemu		2019-05-28 18:35:07 -04:00
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trans_privileged.inc.c	RISC-V: fix single stepping over ret and other branching instructions	2019-05-28 18:35:07 -04:00
trans_rva.inc.c	target/riscv: Convert RV64A insns to decodetree	2019-03-18 16:27:53 -04:00
trans_rvc.inc.c	decodetree: Add DisasContext argument to !function expanders	2019-05-09 17:40:45 -04:00
trans_rvd.inc.c	target/riscv: Convert RV64D insns to decodetree	2019-03-18 16:57:16 -04:00
trans_rvf.inc.c	target/riscv: Convert RV64F insns to decodetree	2019-03-18 16:43:17 -04:00
trans_rvi.inc.c	RISC-V: fix single stepping over ret and other branching instructions	2019-05-28 18:35:07 -04:00
trans_rvm.inc.c	target/riscv: Zero extend the inputs of divuw and remuw	2019-03-26 20:38:17 -04:00