Peter Maydell 82b8e97f76 target/arm: Gate "miscellaneous FP" insns by ID register field ... There is a set of VFP instructions which we implement in disas_vfp_v8_insn() and gate on the ARM_FEATURE_V8 bit. These were all first introduced in v8 for A-profile, but in M-profile they appeared in v7M. Gate them on the MVFR2 FPMisc field instead, and rename the function appropriately. Backports commit c0c760afe800b60b48c80ddf3509fec413594778 from qemu		2019-02-28 15:26:27 -05:00
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arm	target/arm: Gate "miscellaneous FP" insns by ID register field	2019-02-28 15:26:27 -05:00
i386	Revert "i386: Add CPUID bit for PCONFIG"	2019-02-07 08:56:40 -05:00
m68k	target/m68k: Fix LGPL information in the file headers	2019-02-03 17:55:29 -05:00
mips	target/mips: reimplement SC instruction emulation and use cmpxchg	2019-02-15 17:10:16 -05:00
sparc	target: Resolve repeated typedef warnings	2019-01-22 20:27:35 -05:00