Richard Henderson 87c20b52c0 target/arm: Handle SVE vector length changes in system mode ... SVE vector length can change when changing EL, or when writing to one of the ZCR_ELn registers. For correctness, our implementation requires that predicate bits that are inaccessible are never set. Which means noticing length changes and zeroing the appropriate register bits. Backports commit 0ab5953b00b3165877d00cf75de628c51670b550 from qemu		2018-10-08 14:15:15 -04:00
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arm	target/arm: Handle SVE vector length changes in system mode	2018-10-08 14:15:15 -04:00
i386	Initializes i386 prefix value	2018-10-06 04:57:06 -04:00
m68k	Removes accessible assert	2018-10-06 05:02:20 -04:00
mips	Mips undefined shift fix	2018-10-06 05:00:27 -04:00
sparc	Sparc increase ttl number	2018-10-06 04:55:52 -04:00