unicorn/qemu/target
Michael Davidsaver 8828b4e595
armv7m: MRS/MSR: handle unprivileged access
The MRS and MSR instruction handling has a number of flaws:
* unprivileged accesses should only be able to read
CONTROL and the xPSR subfields, and only write APSR
(others RAZ/WI)
* privileged access should not be able to write xPSR
subfields other than APSR
* accesses to unimplemented registers should log as
guest errors, not abort QEMU

Backports commit 58117c9bb429cd9552d998687aa99088eb1d8528 from qemu
2018-03-02 13:29:59 -05:00
..
arm armv7m: MRS/MSR: handle unprivileged access 2018-03-02 13:29:59 -05:00
i386 i386: Change stepping of Haswell to non-blacklisted value 2018-03-02 12:53:11 -05:00
m68k Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
mips target-mips: Provide function to test if a CPU supports an ISA 2018-03-02 08:20:19 -05:00
sparc cputlb and arm/sparc targets: convert mmuidx flushes from varg to bitmap 2018-03-02 10:12:40 -05:00