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unicorn/qemu/target
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Alex Bennée 8ac9e3cff2
arm/translate-a64: add FP16 FCMxx (zero) to simd_two_reg_misc_fp16 
I re-use the existing handle_2misc_fcmp_zero handler and tweak it
slightly to deal with the half-precision case.

Backports commit 7d4dd1a73a023f75c893623710e43743501b318e from qemu
2018-03-08 18:32:36 -05:00
..
arm arm/translate-a64: add FP16 FCMxx (zero) to simd_two_reg_misc_fp16 2018-03-08 18:32:36 -05:00
i386 target/*/cpu.h: remove softfloat.h 2018-03-08 09:58:47 -05:00
m68k target/*/cpu.h: remove softfloat.h 2018-03-08 09:58:47 -05:00
mips unicorn/mips: Lessen the amount of MIPS_CPU macro usage 2018-03-07 10:50:08 -05:00
sparc target/*/cpu.h: remove softfloat.h 2018-03-08 09:58:47 -05:00