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8f64168d1f
Correct these issues with the handling of CP0.Status for MIPSr6: * only ignore the bit pattern of 0b11 on writes to CP0.Status.KSU, that is for processors that do implement Supervisor Mode, let the bit pattern be written to CP0.Status.UM:R0 freely (of course the value written to read-only CP0.Status.R0 will be discarded anyway); this is in accordance to the relevant architecture specification[1], * check the newly written pattern rather than the current contents of CP0.Status for the KSU bits being 0b11, * use meaningful macro names to refer to CP0.Status bits rather than magic numbers. References: [1] "MIPS Architecture For Programmers, Volume III: MIPS64 / microMIPS64 Privileged Resource Architecture", MIPS Technologies, Inc., Document Number: MD00091, Revision 6.00, March 31, 2014, Table 9.45 "Status Register Field Descriptions", pp. 210-211. Backports commit f88f79ec9df06d26d84e1d2e0c02d2634b4d8583 from qemu |
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| .. | ||
| cpu-qom.h | ||
| cpu.c | ||
| cpu.h | ||
| dsp_helper.c | ||
| helper.c | ||
| helper.h | ||
| lmi_helper.c | ||
| Makefile.objs | ||
| mips-defs.h | ||
| msa_helper.c | ||
| op_helper.c | ||
| TODO | ||
| translate.c | ||
| translate_init.c | ||
| unicorn.c | ||
| unicorn.h | ||