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Leon Alrae 8fadc55db3
target-mips: make ITC Configuration Tags accessible to the CPU 
Add CP0.ErrCtl register with WST, SPR and ITC bits. In 34K and interAptiv
processors these bits are used to enable CACHE instruction access to
different arrays. When WST=0, SPR=0 and ITC=1 the CACHE instruction will
access ITC tag values.

Generally we do not model caches and we have been treating the CACHE
instruction as NOP. But since CACHE can operate on ITC Tags new
MIPS_HFLAG_ITC_CACHE hflag is introduced to generate the helper only when
CACHE is in the ITC Access mode.

Backports commit 0d74a222c27e26fc40f4f6120c61c3f9ceaa3776 from qemu
2018-03-04 00:34:30 -05:00
..
crypto crypto: Clean up includes 2018-02-19 00:47:40 -05:00
default-configs arm64eb: add support for ARM64 big endian. 2017-04-24 23:30:01 +08:00
docs docs: clarify memory region lifecycle 2018-02-12 15:11:21 -05:00
fpu softfloat: define floatx80_round() 2018-03-03 20:57:27 -05:00
hw i386: Remove AMD feature flag aliases from Opteron models 2018-03-01 23:49:04 -05:00
include tcg: Pass generic CPUState to gen_intermediate_code() 2018-03-03 23:34:18 -05:00
qapi qapi: add explicit null to string input and output visitors 2018-03-03 20:32:50 -05:00
qobject qnum: add uint type 2018-03-03 18:37:56 -05:00
qom qom: Fix ambiguous path detection when ambiguous=NULL 2018-03-03 22:49:21 -05:00
scripts scripts: use build_ prefix for string not piped through cgen() 2018-03-03 22:11:28 -05:00
target target-mips: make ITC Configuration Tags accessible to the CPU 2018-03-04 00:34:30 -05:00
tcg tcg/mips: reserve a register for the guest_base. 2018-03-03 23:04:55 -05:00
util util/cacheinfo: Add missing include for ppc linux 2018-03-03 23:05:44 -05:00
aarch64.h memory: Rename memory_region_init_rom() and _rom_device() to _nomigrate() 2018-03-03 22:29:01 -05:00
aarch64eb.h memory: Rename memory_region_init_rom() and _rom_device() to _nomigrate() 2018-03-03 22:29:01 -05:00
accel.c clean-up: removed duplicate #includes 2018-02-28 08:51:56 -05:00
arm.h memory: Rename memory_region_init_rom() and _rom_device() to _nomigrate() 2018-03-03 22:29:01 -05:00
armeb.h memory: Rename memory_region_init_rom() and _rom_device() to _nomigrate() 2018-03-03 22:29:01 -05:00
atomic_template.h tcg: Add atomic128 helpers 2018-02-27 21:43:48 -05:00
CODING_STYLE import 2015-08-21 15:04:50 +08:00
configure build: add -Wexpansion-to-defined 2018-03-03 22:12:31 -05:00
COPYING import 2015-08-21 15:04:50 +08:00
COPYING.LIB import 2015-08-21 15:04:50 +08:00
cpu-exec-common.c tcg: Add EXCP_ATOMIC 2018-02-27 11:57:58 -05:00
cpu-exec.c tcg: Introduce goto_ptr opcode and tcg_gen_lookup_and_goto_ptr 2018-03-02 21:05:18 -05:00
cpus.c tcg: handle EXCP_ATOMIC exception for system emulation 2018-03-02 09:56:43 -05:00
cputlb.c tcg: consistently access cpu->tb_jmp_cache atomically 2018-03-03 21:12:36 -05:00
exec.c Revert "exec.c: Fix breakpoint invalidation race" 2018-03-03 22:14:35 -05:00
gen_all_header.sh arm64eb: add support for ARM64 big endian. 2017-04-24 23:30:01 +08:00
glib_compat.c qapi: Improve qobject input visitor error reporting 2018-03-02 12:05:53 -05:00
HACKING import 2015-08-21 15:04:50 +08:00
header_gen.py target-mips: make ITC Configuration Tags accessible to the CPU 2018-03-04 00:34:30 -05:00
ioport.c hw: remove pio_addr_t 2018-02-24 02:43:16 -05:00
LICENSE import 2015-08-21 15:04:50 +08:00
m68k.h memory: Rename memory_region_init_rom() and _rom_device() to _nomigrate() 2018-03-03 22:29:01 -05:00
Makefile Makefile: Add a FORCE target 2018-02-24 17:03:51 -05:00
Makefile.objs tcg: Add atomic helpers 2018-02-27 15:57:47 -05:00
Makefile.target tcg: add the CONFIG_TCG into Makefiles 2018-03-03 21:39:30 -05:00
memory.c memory: Rename memory_region_init_rom() and _rom_device() to _nomigrate() 2018-03-03 22:29:01 -05:00
memory_ldst.inc.c exec: introduce memory_ldst.inc.c 2018-03-01 09:59:34 -05:00
memory_mapping.c include/qemu/osdep.h: Don't include qapi/error.h 2018-02-21 23:08:18 -05:00
mips.h target-mips: make ITC Configuration Tags accessible to the CPU 2018-03-04 00:34:30 -05:00
mips64.h target-mips: make ITC Configuration Tags accessible to the CPU 2018-03-04 00:34:30 -05:00
mips64el.h target-mips: make ITC Configuration Tags accessible to the CPU 2018-03-04 00:34:30 -05:00
mipsel.h target-mips: make ITC Configuration Tags accessible to the CPU 2018-03-04 00:34:30 -05:00
powerpc.h memory: Rename memory_region_init_rom() and _rom_device() to _nomigrate() 2018-03-03 22:29:01 -05:00
qapi-schema.json qapi: Update scripts to commit 01b2ffcedd94ad7b42bc870e4c6936c87ad03429 2018-03-03 18:32:12 -05:00
qemu-timer.c timer/cpus: fix some typos and update some comments 2018-02-25 23:21:57 -05:00
rules.mak rules.mak: Don't extract libs from .mo-libs in link command 2018-02-26 02:08:03 -05:00
softmmu_template.h cputlb: Remove includes from softmmu_template.h 2018-02-27 12:40:43 -05:00
sparc.h memory: Rename memory_region_init_rom() and _rom_device() to _nomigrate() 2018-03-03 22:29:01 -05:00
sparc64.h memory: Rename memory_region_init_rom() and _rom_device() to _nomigrate() 2018-03-03 22:29:01 -05:00
tcg-runtime.c tcg: Increase hit rate of lookup_tb_ptr 2018-03-03 17:16:23 -05:00
translate-all.c tcg: Pass generic CPUState to gen_intermediate_code() 2018-03-03 23:34:18 -05:00
translate-all.h translate-all.c: Compute L1 page table properties at runtime 2018-02-26 11:46:58 -05:00
translate-common.c exec: Clean up includes 2018-02-19 00:49:55 -05:00
unicorn_common.h qom/cpu: Add MemoryRegion property 2018-02-18 21:54:50 -05:00
VERSION import 2015-08-21 15:04:50 +08:00
vl.c util: add cacheinfo 2018-03-03 16:58:28 -05:00
vl.h import 2015-08-21 15:04:50 +08:00
x86_64.h memory: Rename memory_region_init_rom() and _rom_device() to _nomigrate() 2018-03-03 22:29:01 -05:00