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unicorn/qemu/target
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Alex Bennée 996f38056f
target/arm/cpu.h: add additional float_status flags 
Half-precision flush to zero behaviour is controlled by a separate
FZ16 bit in the FPCR. To handle this we pass a pointer to
fp_status_fp16 when working on half-precision operations. The value of
the presented FPCR is calculated from an amalgam of the two when read.

Backports commit d81ce0ef2c4f1052fcdef891a12499eca3084db7 from qemu
2018-03-08 12:34:39 -05:00
..
arm target/arm/cpu.h: add additional float_status flags 2018-03-08 12:34:39 -05:00
i386 target/*/cpu.h: remove softfloat.h 2018-03-08 09:58:47 -05:00
m68k target/*/cpu.h: remove softfloat.h 2018-03-08 09:58:47 -05:00
mips unicorn/mips: Lessen the amount of MIPS_CPU macro usage 2018-03-07 10:50:08 -05:00
sparc target/*/cpu.h: remove softfloat.h 2018-03-08 09:58:47 -05:00