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https://github.com/yuzu-emu/unicorn.git
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af0e282ab1
Accoding the chapter 7.6 Trap Processing of the SPARC Architecture Manual v9, the Trap Based Address Register is not modified as a trap is taken. This fix allows booting FreeBSD-10.3-RELEASE-sparc64. Backports commit de5f1077446ca455342db149737bdc395a7b9882 from qemu
128 lines
3.7 KiB
C
128 lines
3.7 KiB
C
/*
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* Sparc64 interrupt helpers
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*
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* Copyright (c) 2003-2005 Fabrice Bellard
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "cpu.h"
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#include "exec/helper-proto.h"
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void sparc_cpu_do_interrupt(CPUState *cs)
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{
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SPARCCPU *cpu = SPARC_CPU(cs->uc, cs);
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CPUSPARCState *env = &cpu->env;
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int intno = cs->exception_index;
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trap_state *tsptr;
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/* Compute PSR before exposing state. */
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if (env->cc_op != CC_OP_FLAGS) {
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cpu_get_psr(env);
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}
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#if !defined(CONFIG_USER_ONLY)
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if (env->tl >= env->maxtl) {
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cpu_abort(cs, "Trap 0x%04x while trap level (%d) >= MAXTL (%d),"
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" Error state", cs->exception_index, env->tl, env->maxtl);
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return;
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}
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#endif
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if (env->tl < env->maxtl - 1) {
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env->tl++;
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} else {
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env->pstate |= PS_RED;
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if (env->tl < env->maxtl) {
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env->tl++;
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}
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}
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tsptr = cpu_tsptr(env);
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tsptr->tstate = (cpu_get_ccr(env) << 32) |
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((env->asi & 0xff) << 24) | ((env->pstate & 0xf3f) << 8) |
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cpu_get_cwp64(env);
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tsptr->tpc = env->pc;
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tsptr->tnpc = env->npc;
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tsptr->tt = intno;
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switch (intno) {
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case TT_IVEC:
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cpu_change_pstate(env, PS_PEF | PS_PRIV | PS_IG);
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break;
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case TT_TFAULT:
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case TT_DFAULT:
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case TT_TMISS: case TT_TMISS+1: case TT_TMISS+2: case TT_TMISS+3:
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case TT_DMISS: case TT_DMISS+1: case TT_DMISS+2: case TT_DMISS+3:
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case TT_DPROT: case TT_DPROT+1: case TT_DPROT+2: case TT_DPROT+3:
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cpu_change_pstate(env, PS_PEF | PS_PRIV | PS_MG);
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break;
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default:
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cpu_change_pstate(env, PS_PEF | PS_PRIV | PS_AG);
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break;
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}
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if (intno == TT_CLRWIN) {
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cpu_set_cwp(env, cpu_cwp_dec(env, env->cwp - 1));
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} else if ((intno & 0x1c0) == TT_SPILL) {
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cpu_set_cwp(env, cpu_cwp_dec(env, env->cwp - env->cansave - 2));
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} else if ((intno & 0x1c0) == TT_FILL) {
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cpu_set_cwp(env, cpu_cwp_inc(env, env->cwp + 1));
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}
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env->pc = env->tbr & ~0x7fffULL;
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env->pc |= ((env->tl > 1) ? 1 << 14 : 0) | (intno << 5);
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env->npc = env->pc + 4;
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cs->exception_index = -1;
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}
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trap_state *cpu_tsptr(CPUSPARCState* env)
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{
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return &env->ts[env->tl & MAXTL_MASK];
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}
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static bool do_modify_softint(CPUSPARCState *env, uint32_t value)
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{
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if (env->softint != value) {
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env->softint = value;
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#if !defined(CONFIG_USER_ONLY)
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if (cpu_interrupts_enabled(env)) {
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//cpu_check_irqs(env);
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}
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#endif
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return true;
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}
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return false;
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}
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void helper_set_softint(CPUSPARCState *env, uint64_t value)
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{
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if (do_modify_softint(env, env->softint | (uint32_t)value)) {
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//trace_int_helper_set_softint(env->softint);
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}
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}
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void helper_clear_softint(CPUSPARCState *env, uint64_t value)
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{
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if (do_modify_softint(env, env->softint & (uint32_t)~value)) {
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//trace_int_helper_clear_softint(env->softint);
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}
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}
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void helper_write_softint(CPUSPARCState *env, uint64_t value)
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{
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if (do_modify_softint(env, (uint32_t)value)) {
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//trace_int_helper_write_softint(env->softint);
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}
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}
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