Richard Henderson 9bbc412c66 target/arm: Hoist address increment for vector memory ops ... This can reduce the number of opcodes required for certain complex forms of load-multiple (e.g. ld4.16b). Backports commit a7d8143aed2268f147cc1abfebc848ed6282a313 from qemu		2018-11-10 09:39:20 -05:00
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arm	target/arm: Hoist address increment for vector memory ops	2018-11-10 09:39:20 -05:00
i386	target/i386: Convert to HAVE_CMPXCHG128	2018-10-23 15:21:03 -04:00
m68k	Removes accessible assert	2018-10-06 05:02:20 -04:00
mips	target/mips: Add opcodes for nanoMIPS EVA instructions	2018-10-23 14:33:08 -04:00
sparc	Sparc increase ttl number	2018-10-06 04:55:52 -04:00