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All M profile CPUs are PMSA, so set the feature bit. (We haven't actually implemented the M profile MPU register interface yet, but setting this feature bit gives us closer to correct behaviour for the MPU-disabled case.) Backports commit 790a11503cfb5e1dcd031ea2212bbebae4ca3cec from qemu |
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m68k | ||
mips | ||
sparc |