unicorn/qemu/include/hw/riscv/spike.h
Alistair Francis b23e786779 riscv: spike: Remove target macro conditionals
Backports dc4d4aaee31cd3ac4020d3b15729f0a104ce8862
2021-03-08 15:20:41 -05:00

7 lines
152 B
C

#ifndef HW_RISCV_SPIKE_H
#define HW_RISCV_SPIKE_H
void spike_v1_10_0_machine_init_register_types(struct uc_struct *uc);
#endif /* HW_RISCV_SPIKE_H */