Rémi Denis-Courmont a4053565d6 target/arm: fix LORID_EL1 access check ... Secure mode is not exempted from checking SCR_EL3.TLOR, and in the future HCR_EL2.TLOR when S-EL2 is enabled. Backports 9bd268bae5c4760870522292fb1d46e7da7e372a		2021-03-02 13:06:50 -05:00
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arm	target/arm: fix LORID_EL1 access check	2021-03-02 13:06:50 -05:00
i386	i386/cpu: Clear FEAT_XSAVE_COMP_{LO,HI} when XSAVE is not available	2021-03-01 19:04:03 -05:00
m68k	target/m68k: consolidate physical translation offset into get_physical_address()	2021-02-25 23:13:48 -05:00
mips	target/mips: Support variable page size	2020-06-14 21:09:51 -04:00
riscv	target/riscv: Set instance_align on RISCVCPU TypeInfo	2021-03-01 19:00:27 -05:00
sparc	softfloat: Name compare relation enum	2020-05-21 18:08:52 -04:00