Peter Maydell 7427cca6cc target/arm: Convert Neon one-register-and-immediate insns to decodetree ... Convert the insns in the one-register-and-immediate group to decodetree. In the new decode, our asimd_imm_const() function returns a 64-bit value rather than a 32-bit one, which means we don't need to treat cmode=14 op=1 as a special case in the decoder (it is the only encoding where the two halves of the 64-bit value are different). Backports commit 2c35a39eda0b16c2ed85c94cec204bf5efb97812 from qemu		2020-06-15 12:44:54 -04:00
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arm	target/arm: Convert Neon one-register-and-immediate insns to decodetree	2020-06-15 12:44:54 -04:00
i386	softfloat: Name compare relation enum	2020-05-21 18:08:52 -04:00
m68k	target/m68k: implement opcode fetoxm1	2020-06-14 21:13:29 -04:00
mips	target/mips: Support variable page size	2020-06-14 21:09:51 -04:00
riscv	target/riscv: Add the lowRISC Ibex CPU	2020-06-14 22:28:55 -04:00
sparc	softfloat: Name compare relation enum	2020-05-21 18:08:52 -04:00