unicorn/qemu/target
Fredrik Noring baf2fe0fc1
target/mips: Introduce 32 R5900 multimedia registers
The 32 R5900 128-bit registers are split into two 64-bit halves:
the lower halves are the GPRs and the upper halves are accessible
by the R5900-specific multimedia instructions.

Backports commit a168a796e1c251787fcdf2d9ca1e9e69cb86ffcd from qemu
2019-01-22 20:14:56 -05:00
..
arm target/arm: Implement PMSWINC 2019-01-22 18:59:26 -05:00
i386 i386/kvm: add a comment explaining why .feat_names are commented out for Hyper-V feature bits 2019-01-14 15:02:35 -05:00
m68k m68k: Silence compiler warnings 2018-11-16 21:23:55 -05:00
mips target/mips: Introduce 32 R5900 multimedia registers 2019-01-22 20:14:56 -05:00
sparc Sparc increase ttl number 2018-10-06 04:55:52 -04:00