mirror of
https://github.com/yuzu-emu/unicorn.git
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2070ef1c37
Define a new MachineClass field ignore_memory_transaction_failures. If this is flag is true then the CPU will ignore memory transaction failures which should cause the CPU to take an exception due to an access to an unassigned physical address; the transaction will instead return zero (for a read) or be ignored (for a write). This should be set only by legacy board models which rely on the old RAZ/WI behaviour for handling devices that QEMU does not yet model. New board models should instead use "unimplemented-device" for all memory ranges where the guest will attempt to probe for a device that QEMU doesn't implement and a stub device is required. We need this for ARM boards, where we're about to implement support for generating external aborts on memory transaction failures. Too many of our legacy board models rely on the RAZ/WI behaviour and we would break currently working guests when their "probe for device" code provoked an external abort rather than a RAZ. Backports commit ed860129acd3fcd0b1e47884e810212aaca4d21b from qemu
339 lines
8.4 KiB
C
339 lines
8.4 KiB
C
/*
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* QEMU CPU model
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*
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* Copyright (c) 2012-2014 SUSE LINUX Products GmbH
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see
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* <http://www.gnu.org/licenses/gpl-2.0.html>
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*/
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "qemu-common.h"
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#include "hw/boards.h"
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#include "qemu/log.h"
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#include "uc_priv.h"
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CPUState *cpu_by_arch_id(struct uc_struct *uc, int64_t id)
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{
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CPUState *cpu = uc->cpu;
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CPUClass *cc = CPU_GET_CLASS(uc, cpu);
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if (cc->get_arch_id(cpu) == id) {
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return cpu;
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}
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return NULL;
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}
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bool cpu_exists(struct uc_struct *uc, int64_t id)
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{
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return !!cpu_by_arch_id(uc, id);
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}
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CPUState *cpu_generic_init(struct uc_struct *uc, const char *typename, const char *cpu_model)
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{
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char *str, *name, *featurestr;
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CPUState *cpu;
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ObjectClass *oc;
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CPUClass *cc;
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Error *err = NULL;
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str = g_strdup(cpu_model);
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name = strtok(str, ",");
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oc = cpu_class_by_name(uc, typename, name);
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if (oc == NULL) {
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g_free(str);
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return NULL;
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}
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cpu = CPU(object_new(uc, object_class_get_name(oc)));
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cc = CPU_GET_CLASS(uc, cpu);
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featurestr = strtok(NULL, ",");
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cc->parse_features(cpu, featurestr, &err);
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g_free(str);
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if (err != NULL) {
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goto out;
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}
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object_property_set_bool(uc, OBJECT(cpu), true, "realized", &err);
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out:
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if (err != NULL) {
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error_free(err);
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object_unref(uc, OBJECT(cpu));
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return NULL;
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}
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return cpu;
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}
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bool cpu_paging_enabled(const CPUState *cpu)
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{
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CPUClass *cc = CPU_GET_CLASS(cpu->uc, cpu);
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return cc->get_paging_enabled(cpu);
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}
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static bool cpu_common_get_paging_enabled(const CPUState *cpu)
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{
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return false;
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}
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void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
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Error **errp)
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{
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CPUClass *cc = CPU_GET_CLASS(cpu->uc, cpu);
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cc->get_memory_mapping(cpu, list, errp);
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}
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static void cpu_common_get_memory_mapping(CPUState *cpu,
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MemoryMappingList *list,
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Error **errp)
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{
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error_setg(errp, "Obtaining memory mappings is unsupported on this CPU.");
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}
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void cpu_reset_interrupt(CPUState *cpu, int mask)
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{
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cpu->interrupt_request &= ~mask;
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}
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void cpu_exit(CPUState *cpu)
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{
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atomic_set(&cpu->exit_request, 1);
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/* Ensure cpu_exec will see the exit request after TCG has exited. */
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smp_wmb();
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atomic_set(&cpu->tcg_exit_req, 1);
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}
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static void cpu_common_noop(CPUState *cpu)
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{
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}
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static bool cpu_common_exec_interrupt(CPUState *cpu, int int_req)
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{
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return false;
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}
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void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
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int flags)
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{
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CPUClass *cc = CPU_GET_CLASS(cpu->uc, cpu);
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if (cc->dump_state) {
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cc->dump_state(cpu, f, cpu_fprintf, flags);
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}
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}
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void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
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int flags)
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{
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CPUClass *cc = CPU_GET_CLASS(cpu->uc, cpu);
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if (cc->dump_statistics) {
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cc->dump_statistics(cpu, f, cpu_fprintf, flags);
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}
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}
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void cpu_reset(CPUState *cpu)
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{
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CPUClass *klass = CPU_GET_CLASS(cpu->uc, cpu);
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if (klass->reset != NULL) {
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(*klass->reset)(cpu);
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}
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}
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static void cpu_common_reset(CPUState *cpu)
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{
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CPUClass *cc = CPU_GET_CLASS(cpu->uc, cpu);
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if (qemu_loglevel_mask(CPU_LOG_RESET)) {
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qemu_log("CPU Reset (CPU %d)\n", cpu->cpu_index);
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log_cpu_state(cpu, cc->reset_dump_flags);
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}
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cpu->interrupt_request = 0;
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cpu->halted = 0;
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cpu->mem_io_pc = 0;
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cpu->mem_io_vaddr = 0;
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cpu->icount_extra = 0;
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cpu->icount_decr.u32 = 0;
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cpu->can_do_io = 0;
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cpu->exception_index = -1;
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cpu->crash_occurred = false;
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// TODO: Should be uncommented, but good 'ol
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// unicorn's crappy symbol deduplication
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// makes it impossible right now
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//if (tcg_enabled(cpu->uc)) {
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cpu_tb_jmp_cache_clear(cpu);
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// Ditto: should also be uncommented
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//tcg_flush_softmmu_tlb(cpu);
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//}
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}
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static bool cpu_common_has_work(CPUState *cs)
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{
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return false;
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}
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static bool cpu_common_debug_check_watchpoint(CPUState *cpu, CPUWatchpoint *wp)
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{
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/* If no extra check is required, QEMU watchpoint match can be considered
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* as an architectural match.
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*/
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return true;
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}
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ObjectClass *cpu_class_by_name(struct uc_struct *uc, const char *typename, const char *cpu_model)
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{
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CPUClass *cc = CPU_CLASS(uc, object_class_by_name(uc, typename));
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return cc->class_by_name(uc, cpu_model);
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}
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static ObjectClass *cpu_common_class_by_name(struct uc_struct *uc, const char *cpu_model)
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{
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return NULL;
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}
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static void cpu_common_parse_features(CPUState *cpu, char *features,
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Error **errp)
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{
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char *featurestr; /* Single "key=value" string being parsed */
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char *val;
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Error *err = NULL;
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featurestr = features ? strtok(features, ",") : NULL;
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while (featurestr) {
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val = strchr(featurestr, '=');
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if (val) {
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*val = 0;
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val++;
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object_property_parse(cpu->uc, OBJECT(cpu), val, featurestr, &err);
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if (err) {
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error_propagate(errp, err);
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return;
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}
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} else {
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error_setg(errp, "Expected key=value format, found %s.",
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featurestr);
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return;
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}
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featurestr = strtok(NULL, ",");
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}
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}
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static int cpu_common_realizefn(struct uc_struct *uc, DeviceState *dev, Error **errp)
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{
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CPUState *cpu = CPU(dev);
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Object *machine = qdev_get_machine(uc);
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/* qdev_get_machine() can return something that's not TYPE_MACHINE
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* if this is one of the user-only emulators; in that case there's
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* no need to check the ignore_memory_transaction_failures board flag.
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*/
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if (object_dynamic_cast(uc, machine, TYPE_MACHINE)) {
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ObjectClass *oc = object_get_class(machine);
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MachineClass *mc = MACHINE_CLASS(uc, oc);
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if (mc) {
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cpu->ignore_memory_transaction_failures =
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mc->ignore_memory_transaction_failures;
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}
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}
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if (dev->hotplugged) {
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cpu_resume(cpu);
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}
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return 0;
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}
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static void cpu_common_initfn(struct uc_struct *uc, Object *obj, void *opaque)
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{
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CPUState *cpu = CPU(obj);
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QTAILQ_INIT(&cpu->breakpoints);
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QTAILQ_INIT(&cpu->watchpoints);
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}
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static int64_t cpu_common_get_arch_id(CPUState *cpu)
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{
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return cpu->cpu_index;
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}
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static vaddr cpu_adjust_watchpoint_address(CPUState *cpu, vaddr addr, int len)
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{
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return addr;
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}
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static void cpu_class_init(struct uc_struct *uc, ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(uc, klass);
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CPUClass *k = CPU_CLASS(uc, klass);
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k->class_by_name = cpu_common_class_by_name;
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k->parse_features = cpu_common_parse_features;
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k->reset = cpu_common_reset;
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k->get_arch_id = cpu_common_get_arch_id;
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k->has_work = cpu_common_has_work;
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k->get_paging_enabled = cpu_common_get_paging_enabled;
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k->get_memory_mapping = cpu_common_get_memory_mapping;
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k->debug_excp_handler = cpu_common_noop;
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k->debug_check_watchpoint = cpu_common_debug_check_watchpoint;
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k->cpu_exec_enter = cpu_common_noop;
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k->cpu_exec_exit = cpu_common_noop;
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k->cpu_exec_interrupt = cpu_common_exec_interrupt;
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k->adjust_watchpoint_address = cpu_adjust_watchpoint_address;
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dc->realize = cpu_common_realizefn;
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/*
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* Reason: CPUs still need special care by board code: wiring up
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* IRQs, adding reset handlers, halting non-first CPUs, ...
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*/
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dc->cannot_instantiate_with_device_add_yet = true;
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}
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static const TypeInfo cpu_type_info = {
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TYPE_CPU,
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TYPE_DEVICE,
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sizeof(CPUClass),
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sizeof(CPUState),
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NULL,
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cpu_common_initfn,
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NULL,
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NULL,
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NULL,
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cpu_class_init,
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NULL,
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NULL,
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true,
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};
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void cpu_register_types(struct uc_struct *uc)
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{
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type_register_static(uc, &cpu_type_info);
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}
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