Aleksandar Markovic bf7da7bf57 target/mips: MXU: Add handlers for logic instructions ... Add translation handlers for four logic MXU instructions. It should be noted that there is an error in MXU documentation (dated June 2017) regarding opcodes for this group of instructions. This was confirmed by running tests on hardware, and also by looking up other related public source trees (binutils, Android NDK). In initial MXU patches to QEMU, opcodes for MXU logic instructions were created to be in accordance with the MXU documentation, therefore the error from was propagated. This patch corrects that, changing the involved code. Besides that, as MXU was designed and implemented only for 32-bit CPUs, corresponding preprosessor conditions were added around MXU code, which allows more flexible implementation of MXU handlers. Backports commit b621f0187ef789aeef733cf79e5ac83984752394 from qemu		2019-01-05 07:48:08 -05:00
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arm	target/arm: Free name string in ARMCPRegInfo hashtable entries'	2018-12-18 05:09:59 -05:00
i386	i386: Add stibp flag name	2018-12-18 03:48:53 -05:00
m68k	m68k: Silence compiler warnings	2018-11-16 21:23:55 -05:00
mips	target/mips: MXU: Add handlers for logic instructions	2019-01-05 07:48:08 -05:00
sparc	Sparc increase ttl number	2018-10-06 04:55:52 -04:00