Peter Maydell c7b5fccfb8 target/arm: Prepare for CONTROL.SPSEL being nonzero in Handler mode ... In the v7M architecture, there is an invariant that if the CPU is in Handler mode then the CONTROL.SPSEL bit cannot be nonzero. This in turn means that the current stack pointer is always indicated by CONTROL.SPSEL, even though Handler mode always uses the Main stack pointer. In v8M, this invariant is removed, and CONTROL.SPSEL may now be nonzero in Handler mode (though Handler mode still always uses the Main stack pointer). In preparation for this change, change how we handle this bit: rename switch_v7m_sp() to the now more accurate write_v7m_control_spsel(), and make it check both the handler mode state and the SPSEL bit. Note that this implicitly changes the point at which we switch active SP on exception exit from before we pop the exception frame to after it. Backports commit de2db7ec894f11931932ca78cd14a8d2b1389d5b from qemu		2018-03-05 01:29:54 -05:00
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arm	target/arm: Prepare for CONTROL.SPSEL being nonzero in Handler mode	2018-03-05 01:29:54 -05:00
i386	i386/cpu/hyperv: support over 64 vcpus for windows guests	2018-03-05 00:00:53 -05:00
m68k	target/m68k: Switch fpu_rom from make_floatx80() to make_floatx80_init()	2018-03-04 23:05:01 -05:00
mips	mips: Improve macro parenthesization	2018-03-05 00:51:51 -05:00
sparc	sparc: Fix typedef clash	2018-03-04 23:05:50 -05:00