unicorn/qemu/accel/tcg
Emilio G. Cota 23a55a277f
tcg: enable multiple TCG contexts in softmmu
This enables parallel TCG code generation. However, we do not take
advantage of it yet since tb_lock is still held during tb_gen_code.

In user-mode we use a single TCG context; see the documentation
added to tcg_region_init for the rationale.

Note that targets do not need any conversion: targets initialize a
TCGContext (e.g. defining TCG globals), and after this initialization
has finished, the context is cloned by the vCPU threads, each of
them keeping a separate copy.

TCG threads claim one entry in tcg_ctxs[] by atomically increasing
n_tcg_ctxs. Do not be too annoyed by the subsequent atomic_read's
of that variable and tcg_ctxs; they are there just to play nice with
analysis tools such as thread sanitizer.

Note that we do not allocate an array of contexts (we allocate
an array of pointers instead) because when tcg_context_init
is called, we do not know yet how many contexts we'll use since
the bool behind qemu_tcg_mttcg_enabled() isn't set yet.

Previous patches folded some TCG globals into TCGContext. The non-const
globals remaining are only set at init time, i.e. before the TCG
threads are spawned. Here is a list of these set-at-init-time globals
under tcg/:

Only written by tcg_context_init:
- indirect_reg_alloc_order
- tcg_op_defs
Only written by tcg_target_init (called from tcg_context_init):
- tcg_target_available_regs
- tcg_target_call_clobber_regs
- arm: arm_arch, use_idiv_instructions
- i386: have_cmov, have_bmi1, have_bmi2, have_lzcnt,
have_movbe, have_popcnt
- mips: use_movnz_instructions, use_mips32_instructions,
use_mips32r2_instructions, got_sigill (tcg_target_detect_isa)
- ppc: have_isa_2_06, have_isa_3_00, tb_ret_addr
- s390: tb_ret_addr, s390_facilities
- sparc: qemu_ld_trampoline, qemu_st_trampoline (build_trampolines),
use_vis3_instructions

Only written by tcg_prologue_init:
- 'struct jit_code_entry one_entry'
- aarch64: tb_ret_addr
- arm: tb_ret_addr
- i386: tb_ret_addr, guest_base_flags
- ia64: tb_ret_addr
- mips: tb_ret_addr, bswap32_addr, bswap32u_addr, bswap64_addr

Backports commit 3468b59e18b179bc63c7ce934de912dfa9596122 from qemu
2018-03-14 14:32:34 -04:00
..
atomic_template.h accel/tcg: move atomic_template.h to accel/tcg/ 2018-03-13 12:28:50 -04:00
cpu-exec-common.c tcg: move tcg backend files into accel/tcg/ 2018-03-13 11:48:15 -04:00
cpu-exec.c tcg: take tb_ctx out of TCGContext 2018-03-14 09:18:12 -04:00
cputlb.c tcg: move tcg backend files into accel/tcg/ 2018-03-13 11:48:15 -04:00
Makefile.objs tcg: move tcg backend files into accel/tcg/ 2018-03-13 11:48:15 -04:00
softmmu_template.h accel/tcg: move softmmu_template.h to accel/tcg/ 2018-03-13 12:27:04 -04:00
tcg-runtime-gvec.c tcg: move tcg backend files into accel/tcg/ 2018-03-13 11:48:15 -04:00
tcg-runtime.c tcg: define CF_PARALLEL and use it for TB hashing along with CF_COUNT_MASK 2018-03-13 14:32:43 -04:00
tcg-runtime.h tcg: move tcg backend files into accel/tcg/ 2018-03-13 11:48:15 -04:00
translate-all.c tcg: enable multiple TCG contexts in softmmu 2018-03-14 14:32:34 -04:00
translate-all.h tcg: move tcg backend files into accel/tcg/ 2018-03-13 11:48:15 -04:00
translate-common.c tcg: move tcg backend files into accel/tcg/ 2018-03-13 11:48:15 -04:00
translator.c tcg: convert tb->cflags reads to tb_cflags(tb) 2018-03-13 14:57:51 -04:00