Frank Chang da652cb603 target/riscv: fix vs() to return proper error code ... vs() should return -RISCV_EXCP_ILLEGAL_INST instead of -1 if rvv feature is not enabled. If -1 is returned, exception will be raised and cs->exception_index will be set to the negative return value. The exception will then be treated as an instruction access fault instead of illegal instruction fault. Backports 5e437d3ccdccfd85f6e69ca60f921be2dab62c3c		2021-03-30 14:59:37 -04:00
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arm	target/arm: Update sve reduction vs simd_desc	2021-03-30 14:44:53 -04:00
i386	qemu/atomic.h: rename atomic_ to qatomic_	2021-03-08 14:34:35 -05:00
m68k	target/m68k: add M68K_FEATURE_UNALIGNED_DATA feature	2021-03-12 14:55:43 -05:00
mips	mips: Fix build	2021-03-05 08:51:51 -05:00
riscv	target/riscv: fix vs() to return proper error code	2021-03-30 14:59:37 -04:00
sparc	sparc: Fix build	2021-03-05 08:54:43 -05:00