Richard Henderson ebacc7febd target/arm: Update sve reduction vs simd_desc ... With the reduction operations, we intentionally increase maxsz to the next power of 2, so as to fill out the reduction tree correctly. Since e2e7168a214b, oprsz must equal maxsz, with exceptions for small vectors, so this triggers an assertion for vector sizes > 32 that are not themselves a power of 2. Pass the power-of-two value in the simd_data field instead. Backports c648c9b7e1ccff94b51ecbebe86a206952c47e75		2021-03-30 14:44:53 -04:00
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arm	target/arm: Update sve reduction vs simd_desc	2021-03-30 14:44:53 -04:00
i386	qemu/atomic.h: rename atomic_ to qatomic_	2021-03-08 14:34:35 -05:00
m68k	target/m68k: add M68K_FEATURE_UNALIGNED_DATA feature	2021-03-12 14:55:43 -05:00
mips	mips: Fix build	2021-03-05 08:51:51 -05:00
riscv	target/riscv/pmp: Raise exception if no PMP entry is configured	2021-03-08 15:39:55 -05:00
sparc	sparc: Fix build	2021-03-05 08:54:43 -05:00