Richard Henderson f175e89ca2 target/mips: Pass a valid error to raise_mmu_exception for user-only ... At present we give ret = 0, or TLBRET_MATCH. This gets matched by the default case, which falls through to TLBRET_BADADDR. However, it makes more sense to use a proper value. All of the tlb-related exceptions are handled identically in cpu_loop.c, so TLBRET_BADADDR is as good as any other. Retain it. Backports commit 995ffde9622c01f5b307cab47f9bd7962ac09db2 from qemu		2019-05-16 17:14:02 -04:00
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arm	target/arm: Convert to CPUClass::tlb_fill	2019-05-16 16:55:12 -04:00
i386	target/i386: Convert to CPUClass::tlb_fill	2019-05-16 17:08:14 -04:00
m68k	target/m68k: Convert to CPUClass::tlb_fill	2019-05-16 17:12:41 -04:00
mips	target/mips: Pass a valid error to raise_mmu_exception for user-only	2019-05-16 17:14:02 -04:00
riscv	Clean up ill-advised or unusual header guards	2019-05-14 08:02:53 -04:00
sparc	Clean up ill-advised or unusual header guards	2019-05-14 08:02:53 -04:00