unicorn/qemu/target
Peter Maydell f4df29ca4f
target/arm: Fix register definitions for VMIDR and VMPIDR
The register definitions for VMIDR and VMPIDR have separate
reginfo structs for the AArch32 and AArch64 registers. However
the 32-bit versions are wrong:
* they use offsetof instead of offsetoflow32 to mark where
the 32-bit value lives in the uint64_t CPU state field
* they don't mark themselves as ARM_CP_ALIAS

In particular this means that if you try to use an Arm guest CPU
which enables EL2 on a big-endian host it will assert at reset:
target/arm/cpu.c:114: cp_reg_check_reset: Assertion `oldvalue == newvalue' failed.

because the reset of the 32-bit register writes to the top
half of the uint64_t.

Correct the errors in the structures.

Backports commit 36476562d57a3b64bbe86db26e63677dd21907c5 from qemu
2018-03-08 12:26:09 -05:00
..
arm target/arm: Fix register definitions for VMIDR and VMPIDR 2018-03-08 12:26:09 -05:00
i386 target/*/cpu.h: remove softfloat.h 2018-03-08 09:58:47 -05:00
m68k target/*/cpu.h: remove softfloat.h 2018-03-08 09:58:47 -05:00
mips unicorn/mips: Lessen the amount of MIPS_CPU macro usage 2018-03-07 10:50:08 -05:00
sparc target/*/cpu.h: remove softfloat.h 2018-03-08 09:58:47 -05:00