Peter Maydell f628cbdfc3 target/arm: Correct condition for v8M callee stack push ... In v7m_exception_taken() we were incorrectly using a "LR bit EXCRET.ES is 1" check when it should be 0 (compare the pseudocode ExceptionTaken() function). This meant we didn't stack the callee-saved registers when tailchaining from a NonSecure to a Secure exception. Backports commit 7b73a1ca05b33d42278ce29cea4652e22d408165 from qemu		2018-10-08 14:15:15 -04:00
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arm	target/arm: Correct condition for v8M callee stack push	2018-10-08 14:15:15 -04:00
i386	Initializes i386 prefix value	2018-10-06 04:57:06 -04:00
m68k	Removes accessible assert	2018-10-06 05:02:20 -04:00
mips	Mips undefined shift fix	2018-10-06 05:00:27 -04:00
sparc	Sparc increase ttl number	2018-10-06 04:55:52 -04:00