Rémi Denis-Courmont fbdcef3ca5 target/arm: add 64-bit S-EL2 to EL exception table ... With the ARMv8.4-SEL2 extension, EL2 is a legal exception level in secure mode, though it can only be AArch64. This patch adds the target EL for exceptions from 64-bit S-EL2. It also fixes the target EL to EL2 when HCR.{A,F,I}MO are set in secure mode. Those values were never used in practice as the effective value of HCR was always 0 in secure mode. Backports 6c85f906261226e87211506bd9f787fd48a09f17		2021-03-04 14:00:23 -05:00
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arm	target/arm: add 64-bit S-EL2 to EL exception table	2021-03-04 14:00:23 -05:00
i386	target/i386: Check privilege level for protected mode 'int N' task gate	2021-03-03 19:32:10 -05:00
m68k	m68k: fix some comment spelling errors	2021-03-03 19:13:26 -05:00
mips	target/mips: Support variable page size	2020-06-14 21:09:51 -04:00
riscv	target/riscv: Set instance_align on RISCVCPU TypeInfo	2021-03-01 19:00:27 -05:00
sparc	softfloat: Name compare relation enum	2020-05-21 18:08:52 -04:00