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Unicorn CPU emulator framework (ARM, AArch64, M68K, Mips, Sparc, X86)
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Palmer Dabbelt fc662c281a
target/riscv: Zero extend the inputs of divuw and remuw 
While running the GCC test suite against 4.0.0-rc0, Kito found a
regression introduced by the decodetree conversion that caused divuw and
remuw to sign-extend their inputs. The ISA manual says they are
supposed to be zero extended:

DIVW and DIVUW instructions are only valid for RV64, and divide the
lower 32 bits of rs1 by the lower 32 bits of rs2, treating them as
signed and unsigned integers respectively, placing the 32-bit
quotient in rd, sign-extended to 64 bits. REMW and REMUW
instructions are only valid for RV64, and provide the corresponding
signed and unsigned remainder operations respectively. Both REMW
and REMUW always sign-extend the 32-bit result to 64 bits, including
on a divide by zero.

Here's Kito's reduced test case from the GCC test suite

unsigned calc_mp(unsigned mod)
{
unsigned a,b,c;
c=-1;
a=c/mod;
b=0-a*mod;
if (b > mod) { a += 1; b-=mod; }
return b;
}

int main(int argc, char *argv[])
{
unsigned x = 1234;
unsigned y = calc_mp(x);

if ((sizeof (y) == 4 && y != 680)
|| (sizeof (y) == 2 && y != 134))
abort ();
exit (0);
}

I haven't done any other testing on this, but it does fix the test case.

Backports commit f17e02cd3731bdfe2942d1d0b2a92f26da02408c from qemu
2019-03-26 20:38:17 -04:00
bindings Added x86Msr functions for the go bindings (#986) 2019-03-08 02:28:37 -05:00
docs fix invalid script path (#975) (#976) 2019-02-28 17:02:06 -05:00
include target/riscv: Initial introduction of the RISC-V target 2019-03-08 21:46:10 -05:00
msvc msvc: Define CONFIG_TCG 2019-01-30 13:52:30 -05:00
qemu target/riscv: Zero extend the inputs of divuw and remuw 2019-03-26 20:38:17 -04:00
samples target/riscv: Initial introduction of the RISC-V target 2019-03-08 21:46:10 -05:00
tests Add missing x86_vec regression test 2019-02-28 17:08:19 -05:00
.appveyor.yml MSYS test (#852) 2017-06-25 10:11:35 +08:00
.gitignore target/riscv: Initial introduction of the RISC-V target 2019-03-08 21:46:10 -05:00
.travis.yml use new travis osx image and brew (#935) 2018-01-05 10:29:49 +08:00
AUTHORS.TXT import 2015-08-21 15:04:50 +08:00
Brewfile Update Brewfile 2017-09-30 17:36:44 +07:00
ChangeLog update ChangeLog 2017-04-20 13:28:02 +08:00
config.mk Fix document file extension 2016-08-08 17:33:49 +09:00
COPYING import 2015-08-21 15:04:50 +08:00
COPYING.LGPL2 LGPL2 for all header files under include/unicorn/ 2017-12-16 10:08:42 +08:00
COPYING_GLIB glib_compat: add COPYING_GLIB 2016-12-27 10:15:08 +08:00
CREDITS.TXT Adding Philippe Antoine to CREDITS 2018-10-06 04:50:10 -04:00
install-cmocka-linux.sh Start moving examples in S files (#851) 2017-06-25 10:14:22 +08:00
list.c callback to count number of instructions in uc_emu_start() should be executed first. fix #727 2017-06-16 13:22:38 +08:00
make.sh Added MSVC support for arm64eb. 2017-04-25 14:23:58 +10:00
Makefile target/riscv: Initial introduction of the RISC-V target 2019-03-08 21:46:10 -05:00
msvc.bat add msvc.bat 2017-04-21 15:35:40 +08:00
pkgconfig.mk bump extra version to 2 2017-04-21 15:30:40 +08:00
README.md add Clojure 2017-12-23 00:32:33 +08:00
uc.c target/riscv: Initial introduction of the RISC-V target 2019-03-08 21:46:10 -05:00
windows_export.bat Make the call out to visual studio extremely resilient 2017-01-02 03:32:48 -08:00

README.md

Unicorn Engine

Join the chat at https://gitter.im/unicorn-engine/chat

Build Status Build status

Unicorn is a lightweight, multi-platform, multi-architecture CPU emulator framework based on QEMU.

Unicorn offers some unparalleled features:

  • Multi-architecture: ARM, ARM64 (ARMv8), M68K, MIPS, SPARC, and X86 (16, 32, 64-bit)
  • Clean/simple/lightweight/intuitive architecture-neutral API
  • Implemented in pure C language, with bindings for Crystal, Clojure, Visual Basic, Perl, Rust, Ruby, Python, Java, .NET, Go, Delphi/Free Pascal and Haskell.
  • Native support for Windows & *nix (with Mac OSX, Linux, *BSD & Solaris confirmed)
  • High performance via Just-In-Time compilation
  • Support for fine-grained instrumentation at various levels
  • Thread-safety by design
  • Distributed under free software license GPLv2

Further information is available at http://www.unicorn-engine.org

License

This project is released under the GPL license.

Compilation & Docs

See docs/COMPILE.md file for how to compile and install Unicorn.

More documentation is available in docs/README.md.

Contact

Contact us via mailing list, email or twitter for any questions.

Contribute

If you want to contribute, please pick up something from our Github issues.

We also maintain a list of more challenged problems in a TODO list.

CREDITS.TXT records important contributors of our project.