Richard Henderson fc81b12631 target/arm: Diagnose writeback register in list for LDM for v7 ... Prior to v7, for the A32 encoding, this operation wrote an UNKNOWN value back to the base register. Starting in v7 this is UNPREDICTABLE. Backports commit 3949f4675d13c587078f8f423845a3a537a22595 from qemu		2019-11-28 02:46:24 -05:00
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arm	target/arm: Diagnose writeback register in list for LDM for v7	2019-11-28 02:46:24 -05:00
i386	x86: Intel AVX512_BF16 feature enabling	2019-11-18 22:06:57 -05:00
m68k	target/m68k: replace LIT64 with UINT64_C macros	2019-11-18 21:05:59 -05:00
mips	target/mips: Fix emulation of ST.W in system mode	2019-11-18 23:47:33 -05:00
riscv	target/riscv: Remove redundant declaration pragmas	2019-11-18 21:22:09 -05:00
sparc	configure: Define target access alignment in configure	2019-11-18 21:41:35 -05:00