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James Hogan fe0de45a26
target/mips: Fix MIPS64 MFC0 UserLocal on BE host 
Using MFC0 to read CP0_UserLocal uses tcg_gen_ld32s_tl, however
CP0_UserLocal is a target_ulong. On a big endian host with a MIPS64
target this reads and sign extends the more significant half of the
64-bit register.

Fix this by using ld_tl to load the whole target_ulong and ext32s_tl to
sign extend it, as done for various other target_ulong COP0 registers.

Backports commit e40df9a80bb7cdb0a4ca650985fa9fe572097fa7 from qemu
2018-03-03 23:37:41 -05:00
..
arm tcg: Pass generic CPUState to gen_intermediate_code() 2018-03-03 23:34:18 -05:00
i386 tcg: Pass generic CPUState to gen_intermediate_code() 2018-03-03 23:34:18 -05:00
m68k tcg: Pass generic CPUState to gen_intermediate_code() 2018-03-03 23:34:18 -05:00
mips target/mips: Fix MIPS64 MFC0 UserLocal on BE host 2018-03-03 23:37:41 -05:00
sparc tcg: Pass generic CPUState to gen_intermediate_code() 2018-03-03 23:34:18 -05:00