Laurent Vivier fe60494b77 target/m68k: only change valid bits in CACR ... This is used by netBSD (and MacOS ROM) to detect the MMU type Backports commit 18b6102e51bb317d25ee61b49b7b56702b79560c from qemu		2020-01-14 08:17:14 -05:00
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arm	target/arm: ensure we use current exception state after SCR update	2020-01-14 07:51:10 -05:00
i386	i386: Add new CPU model Cooperlake	2020-01-14 08:00:22 -05:00
m68k	target/m68k: only change valid bits in CACR	2020-01-14 08:17:14 -05:00
mips	target/mips: Hard code size with MO_{8|16|32|64}	2020-01-07 18:30:39 -05:00
riscv	tcg: TCGMemOp is now accelerator independent MemOp	2019-11-28 03:01:12 -05:00
sparc	target/sparc: sun4u Invert Endian TTE bit	2020-01-07 19:21:30 -05:00