Sergey Fedorov ffdc9d6323 tcg: Allow goto_tb to any target PC in user mode ... In user mode, there's only a static address translation, TBs are always invalidated properly and direct jumps are reset when mapping change. Thus the destination address is always valid for direct jumps and there's no need to restrict it to the pages the TB resides in. Backports commit 90aa39a1cc4837360889f0e033ca25cc82100308 from qemu		2018-02-23 23:12:14 -05:00
..
cc_helper.c	sparc: Clean up includes	2018-02-19 00:52:41 -05:00
cpu-qom.h	remove slow cpu QOM casts (#815)	2017-05-02 14:56:39 +08:00
cpu.c	include/qemu/osdep.h: Don't include qapi/error.h	2018-02-21 23:08:18 -05:00
cpu.h	tb: consistently use uint32_t for tb->flags	2018-02-23 21:28:11 -05:00
fop_helper.c	sparc: Clean up includes	2018-02-19 00:52:41 -05:00
helper.c	sparc: Clean up includes	2018-02-19 00:52:41 -05:00
helper.h	rework code/block tracing	2016-01-22 18:42:27 -08:00
int32_helper.c	sparc: Clean up includes	2018-02-19 00:52:41 -05:00
int64_helper.c	target-sparc: fix Trap Based Address Register behavior for sparc64	2018-02-23 13:39:59 -05:00
ldst_helper.c	target-sparc: fix Nucleus quad LDD 128 bit access for windowed registers	2018-02-23 13:39:34 -05:00
Makefile.objs	cleanup Sparc unused code	2017-01-23 12:34:00 +08:00
mmu_helper.c	tlb: Add ifetch argument to cpu_mmu_index()	2018-02-17 15:23:37 -05:00
TODO	import	2015-08-21 15:04:50 +08:00
translate.c	tcg: Allow goto_tb to any target PC in user mode	2018-02-23 23:12:14 -05:00
unicorn.c	tcg: Make cpu_regs_sparc a TCGv array	2018-02-21 01:50:28 -05:00
unicorn.h	New feature: registers can be bulk saved/restored in an opaque blob	2016-08-20 04:14:07 -07:00
unicorn64.c	This code should now build the x86_x64-softmmu part 2.	2017-01-19 22:50:28 +11:00
vis_helper.c	sparc: Clean up includes	2018-02-19 00:52:41 -05:00
win_helper.c	sparc: Clean up includes	2018-02-19 00:52:41 -05:00