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https://github.com/yuzu-emu/yuzu-android.git
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glasm: Implement ImageFetch
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3777592ada
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4a22942f45
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@ -80,11 +80,14 @@ EmitContext::EmitContext(IR::Program& program, Bindings& bindings) : info{progra
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Add("OUTPUT out_attr{}[]={{result.attrib[{}..{}]}};", index, index, index);
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}
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}
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const size_t num_textures{program.info.texture_descriptors.size()};
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texture_bindings.resize(num_textures);
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for (size_t index = 0; index < num_textures; ++index) {
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const auto& desc{program.info.texture_descriptors[index]};
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texture_bindings[index] = bindings.texture;
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texture_buffer_bindings.reserve(program.info.texture_buffer_descriptors.size());
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for (const auto& desc : program.info.texture_buffer_descriptors) {
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texture_buffer_bindings.push_back(bindings.texture);
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bindings.texture += desc.count;
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}
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texture_bindings.reserve(program.info.texture_descriptors.size());
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for (const auto& desc : program.info.texture_descriptors) {
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texture_bindings.push_back(bindings.texture);
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bindings.texture += desc.count;
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}
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}
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@ -56,6 +56,7 @@ public:
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RegAlloc reg_alloc{*this};
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const Info& info;
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std::vector<u32> texture_buffer_bindings;
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std::vector<u32> texture_bindings;
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std::string_view stage_name = "invalid";
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@ -43,7 +43,11 @@ struct ScopedRegister {
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std::string Texture(EmitContext& ctx, IR::TextureInstInfo info,
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[[maybe_unused]] const IR::Value& index) {
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// FIXME: indexed reads
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return fmt::format("texture[{}]", ctx.texture_bindings.at(info.descriptor_index));
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if (info.type == TextureType::Buffer) {
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return fmt::format("texture[{}]", ctx.texture_buffer_bindings.at(info.descriptor_index));
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} else {
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return fmt::format("texture[{}]", ctx.texture_bindings.at(info.descriptor_index));
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}
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}
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std::string_view TextureType(IR::TextureInstInfo info) {
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@ -421,11 +425,28 @@ void EmitImageGatherDref(EmitContext& ctx, IR::Inst& inst, const IR::Value& inde
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StoreSparse(ctx, sparse_inst);
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}
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void EmitImageFetch([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] IR::Inst& inst,
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[[maybe_unused]] const IR::Value& index, [[maybe_unused]] Register coord,
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[[maybe_unused]] Register offset, [[maybe_unused]] Register lod,
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[[maybe_unused]] Register ms) {
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throw NotImplementedException("GLASM instruction");
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void EmitImageFetch(EmitContext& ctx, IR::Inst& inst, const IR::Value& index,
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const IR::Value& coord, const IR::Value& offset, ScalarS32 lod, ScalarS32 ms) {
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const auto info{inst.Flags<IR::TextureInstInfo>()};
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const auto sparse_inst{inst.GetAssociatedPseudoOperation(IR::Opcode::GetSparseFromOp)};
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const std::string_view sparse_mod{sparse_inst ? ".SPARSE" : ""};
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const std::string_view type{TextureType(info)};
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const std::string texture{Texture(ctx, info, index)};
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const std::string offset_vec{Offset(ctx, offset)};
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const auto [coord_vec, coord_alloc]{Coord(ctx, coord)};
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const Register ret{ctx.reg_alloc.Define(inst)};
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if (info.type == TextureType::Buffer) {
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ctx.Add("TXF.F{} {},{},{},{}{};", sparse_mod, ret, coord_vec, texture, type, offset_vec);
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} else if (ms.type != Type::Void) {
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ctx.Add("MOV.S {}.w,{};"
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"TXFMS.F{} {},{},{},{}{};",
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coord_vec, ms, sparse_mod, ret, coord_vec, texture, type, offset_vec);
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} else {
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ctx.Add("MOV.S {}.w,{};"
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"TXF.F{} {},{},{},{}{};",
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coord_vec, lod, sparse_mod, ret, coord_vec, texture, type, offset_vec);
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}
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StoreSparse(ctx, sparse_inst);
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}
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void EmitImageQueryDimensions(EmitContext& ctx, IR::Inst& inst, const IR::Value& index,
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@ -541,8 +541,8 @@ void EmitImageGather(EmitContext& ctx, IR::Inst& inst, const IR::Value& index,
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void EmitImageGatherDref(EmitContext& ctx, IR::Inst& inst, const IR::Value& index,
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const IR::Value& coord, const IR::Value& offset, const IR::Value& offset2,
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const IR::Value& dref);
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void EmitImageFetch(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, Register coord,
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Register offset, Register lod, Register ms);
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void EmitImageFetch(EmitContext& ctx, IR::Inst& inst, const IR::Value& index,
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const IR::Value& coord, const IR::Value& offset, ScalarS32 lod, ScalarS32 ms);
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void EmitImageQueryDimensions(EmitContext& ctx, IR::Inst& inst, const IR::Value& index,
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ScalarF32 lod);
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void EmitImageQueryLod(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, Register coord);
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