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common: add cache management functions
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parent
c973029374
commit
70ea1c2000
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@ -34,6 +34,8 @@ add_library(common STATIC
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bit_util.h
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bit_util.h
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cityhash.cpp
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cityhash.cpp
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cityhash.h
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cityhash.h
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cache_management.cpp
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cache_management.h
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common_funcs.h
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common_funcs.h
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common_types.h
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common_types.h
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concepts.h
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concepts.h
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60
src/common/cache_management.cpp
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60
src/common/cache_management.cpp
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// SPDX-FileCopyrightText: Copyright 2022 yuzu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#include <cstring>
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#include "alignment.h"
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#include "cache_management.h"
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#include "common_types.h"
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namespace Common {
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#if defined(ARCHITECTURE_x86_64)
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// Most cache operations are no-ops on x86
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void DataCacheLineCleanByVAToPoU(void* start, size_t size) {}
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void DataCacheLineCleanAndInvalidateByVAToPoC(void* start, size_t size) {}
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void DataCacheLineCleanByVAToPoC(void* start, size_t size) {}
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void DataCacheZeroByVA(void* start, size_t size) {
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std::memset(start, 0, size);
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}
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#elif defined(ARCHITECTURE_arm64)
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// BS/DminLine is log2(cache size in words), we want size in bytes
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#define EXTRACT_DMINLINE(ctr_el0) (1 << ((((ctr_el0) >> 16) & 0xf) + 2))
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#define EXTRACT_BS(dczid_el0) (1 << (((dczid_el0)&0xf) + 2))
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#define DEFINE_DC_OP(op_name, function_name) \
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void function_name(void* start, size_t size) { \
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size_t ctr_el0; \
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asm volatile("mrs %[ctr_el0], ctr_el0\n\t" : [ctr_el0] "=r"(ctr_el0)); \
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size_t cacheline_size = EXTRACT_DMINLINE(ctr_el0); \
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uintptr_t va_start = reinterpret_cast<uintptr_t>(start); \
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uintptr_t va_end = va_start + size; \
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for (uintptr_t va = va_start; va < va_end; va += cacheline_size) { \
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asm volatile("dc " #op_name ", %[va]\n\t" : : [va] "r"(va) : "memory"); \
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} \
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}
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#define DEFINE_DC_OP_DCZID(op_name, function_name) \
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void function_name(void* start, size_t size) { \
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size_t dczid_el0; \
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asm volatile("mrs %[dczid_el0], dczid_el0\n\t" : [dczid_el0] "=r"(dczid_el0)); \
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size_t cacheline_size = EXTRACT_BS(dczid_el0); \
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uintptr_t va_start = reinterpret_cast<uintptr_t>(start); \
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uintptr_t va_end = va_start + size; \
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for (uintptr_t va = va_start; va < va_end; va += cacheline_size) { \
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asm volatile("dc " #op_name ", %[va]\n\t" : : [va] "r"(va) : "memory"); \
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} \
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}
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DEFINE_DC_OP(cvau, DataCacheLineCleanByVAToPoU);
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DEFINE_DC_OP(civac, DataCacheLineCleanAndInvalidateByVAToPoC);
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DEFINE_DC_OP(cvac, DataCacheLineCleanByVAToPoC);
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DEFINE_DC_OP_DCZID(zva, DataCacheZeroByVA);
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#endif
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} // namespace Common
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27
src/common/cache_management.h
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27
src/common/cache_management.h
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@ -0,0 +1,27 @@
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// SPDX-FileCopyrightText: Copyright 2022 yuzu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#pragma once
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#include "stdlib.h"
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namespace Common {
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// Data cache instructions enabled at EL0 by SCTLR_EL1.UCI.
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// VA = virtual address
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// PoC = point of coherency
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// PoU = point of unification
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// dc cvau
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void DataCacheLineCleanByVAToPoU(void* start, size_t size);
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// dc civac
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void DataCacheLineCleanAndInvalidateByVAToPoC(void* start, size_t size);
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// dc cvac
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void DataCacheLineCleanByVAToPoC(void* start, size_t size);
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// dc zva
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void DataCacheZeroByVA(void* start, size_t size);
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} // namespace Common
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