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https://github.com/yuzu-emu/yuzu-android.git
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gl_shader_decompiler: Basic impl. for very simple vertex shaders.
- Tested with Puyo Puyo Tetris and Cave Story+
This commit is contained in:
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51f37f5061
commit
85d77a3d24
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@ -10,10 +10,15 @@
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#include "video_core/engines/shader_bytecode.h"
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#include "video_core/renderer_opengl/gl_shader_decompiler.h"
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namespace Tegra {
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namespace Shader {
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namespace GLShader {
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namespace Decompiler {
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using Tegra::Shader::Attribute;
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using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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using Tegra::Shader::Register;
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using Tegra::Shader::Uniform;
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constexpr u32 PROGRAM_END = MAX_PROGRAM_CODE_LENGTH;
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class DecompileFail : public std::runtime_error {
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@ -90,7 +95,7 @@ private:
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for (u32 offset = begin; offset != end && offset != PROGRAM_END; ++offset) {
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const Instruction instr = {program_code[offset]};
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switch (instr.opcode.Value().EffectiveOpCode()) {
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switch (instr.opcode.EffectiveOpCode()) {
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case OpCode::Id::EXIT: {
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return exit_method = ExitMethod::AlwaysEnd;
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}
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@ -130,7 +135,294 @@ public:
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}
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std::string GetShaderCode() {
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return shader.GetResult();
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return declarations.GetResult() + shader.GetResult();
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}
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private:
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/// Gets the Subroutine object corresponding to the specified address.
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const Subroutine& GetSubroutine(u32 begin, u32 end) const {
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auto iter = subroutines.find(Subroutine{begin, end});
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ASSERT(iter != subroutines.end());
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return *iter;
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}
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/// Generates code representing an input attribute register.
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std::string GetInputAttribute(Attribute::Index attribute) {
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declr_input_attribute.insert(attribute);
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const u32 index{static_cast<u32>(attribute) -
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static_cast<u32>(Attribute::Index::Attribute_0)};
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if (attribute >= Attribute::Index::Attribute_0) {
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return "input_attribute_" + std::to_string(index);
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}
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LOG_ERROR(HW_GPU, "Unhandled input attribute: 0x%02x", index);
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UNREACHABLE();
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}
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/// Generates code representing an output attribute register.
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std::string GetOutputAttribute(Attribute::Index attribute) {
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switch (attribute) {
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case Attribute::Index::Position:
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return "gl_Position";
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default:
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const u32 index{static_cast<u32>(attribute) -
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static_cast<u32>(Attribute::Index::Attribute_0)};
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if (attribute >= Attribute::Index::Attribute_0) {
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declr_output_attribute.insert(attribute);
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return "output_attribute_" + std::to_string(index);
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}
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LOG_ERROR(HW_GPU, "Unhandled output attribute: 0x%02x", index);
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UNREACHABLE();
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}
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}
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/// Generates code representing a temporary (GPR) register.
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std::string GetRegister(const Register& reg) {
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return *declr_register.insert("register_" + std::to_string(reg)).first;
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}
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/// Generates code representing a uniform (C buffer) register.
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std::string GetUniform(const Uniform& reg) const {
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std::string index = std::to_string(reg.index);
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return "uniform_" + index + "[" + std::to_string(reg.offset >> 2) + "][" +
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std::to_string(reg.offset & 3) + "]";
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}
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/**
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* Adds code that calls a subroutine.
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* @param subroutine the subroutine to call.
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*/
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void CallSubroutine(const Subroutine& subroutine) {
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if (subroutine.exit_method == ExitMethod::AlwaysEnd) {
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shader.AddLine(subroutine.GetName() + "();");
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shader.AddLine("return true;");
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} else if (subroutine.exit_method == ExitMethod::Conditional) {
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shader.AddLine("if (" + subroutine.GetName() + "()) { return true; }");
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} else {
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shader.AddLine(subroutine.GetName() + "();");
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}
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}
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/**
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* Writes code that does an assignment operation.
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* @param reg the destination register code.
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* @param value the code representing the value to assign.
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*/
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void SetDest(u64 elem, const std::string& reg, const std::string& value,
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u64 dest_num_components, u64 value_num_components) {
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std::string swizzle = ".";
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swizzle += "xyzw"[elem];
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std::string dest = reg + (dest_num_components != 1 ? swizzle : "");
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std::string src = "(" + value + ")" + (value_num_components != 1 ? swizzle : "");
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shader.AddLine(dest + " = " + src + ";");
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}
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/**
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* Compiles a single instruction from Tegra to GLSL.
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* @param offset the offset of the Tegra shader instruction.
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* @return the offset of the next instruction to execute. Usually it is the current offset
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* + 1. If the current instruction always terminates the program, returns PROGRAM_END.
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*/
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u32 CompileInstr(u32 offset) {
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const Instruction instr = {program_code[offset]};
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shader.AddLine("// " + std::to_string(offset) + ": " + OpCode::GetInfo(instr.opcode).name);
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switch (OpCode::GetInfo(instr.opcode).type) {
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case OpCode::Type::Arithmetic: {
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ASSERT(!instr.nb);
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ASSERT(!instr.aa);
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ASSERT(!instr.na);
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ASSERT(!instr.ab);
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ASSERT(!instr.ad);
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std::string gpr1 = GetRegister(instr.gpr1);
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std::string gpr2 = GetRegister(instr.gpr2);
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std::string uniform = GetUniform(instr.uniform);
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switch (instr.opcode.EffectiveOpCode()) {
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case OpCode::Id::FMUL_C: {
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SetDest(0, gpr1, gpr2 + " * " + uniform, 1, 1);
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break;
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}
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case OpCode::Id::FADD_C: {
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SetDest(0, gpr1, gpr2 + " + " + uniform, 1, 1);
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break;
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}
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case OpCode::Id::FFMA_CR: {
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SetDest(0, gpr1, gpr2 + " * " + uniform + " + " + GetRegister(instr.gpr3), 1, 1);
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break;
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}
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default: {
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LOG_ERROR(HW_GPU, "Unhandled arithmetic instruction: 0x%02x (%s): 0x%08x",
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(int)instr.opcode.EffectiveOpCode(), OpCode::GetInfo(instr.opcode).name,
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instr.hex);
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throw DecompileFail("Unhandled instruction");
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break;
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}
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}
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break;
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}
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case OpCode::Type::Memory: {
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ASSERT(instr.attribute.size == 0);
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std::string gpr1 = GetRegister(instr.gpr1);
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const Attribute::Index attribute = instr.attribute.GetIndex();
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switch (instr.opcode.EffectiveOpCode()) {
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case OpCode::Id::LD_A: {
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SetDest(instr.attribute.element, gpr1, GetInputAttribute(attribute), 1, 4);
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break;
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}
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case OpCode::Id::ST_A: {
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SetDest(instr.attribute.element, GetOutputAttribute(attribute), gpr1, 4, 1);
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break;
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}
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default: {
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LOG_ERROR(HW_GPU, "Unhandled memory instruction: 0x%02x (%s): 0x%08x",
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(int)instr.opcode.EffectiveOpCode(), OpCode::GetInfo(instr.opcode).name,
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instr.hex);
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throw DecompileFail("Unhandled instruction");
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break;
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}
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}
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break;
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}
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default: {
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switch (instr.opcode.EffectiveOpCode()) {
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case OpCode::Id::EXIT: {
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shader.AddLine("return true;");
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offset = PROGRAM_END - 1;
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break;
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}
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default: {
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LOG_ERROR(HW_GPU, "Unhandled instruction: 0x%02x (%s): 0x%08x",
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(int)instr.opcode.EffectiveOpCode(),
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OpCode::GetInfo(instr.opcode).name.c_str(), instr.hex);
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// throw DecompileFail("Unhandled instruction");
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break;
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}
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}
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break;
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}
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}
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return offset + 1;
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}
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/**
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* Compiles a range of instructions from Tegra to GLSL.
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* @param begin the offset of the starting instruction.
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* @param end the offset where the compilation should stop (exclusive).
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* @return the offset of the next instruction to compile. PROGRAM_END if the program
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* terminates.
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*/
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u32 CompileRange(u32 begin, u32 end) {
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u32 program_counter;
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for (program_counter = begin; program_counter < (begin > end ? PROGRAM_END : end);) {
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program_counter = CompileInstr(program_counter);
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}
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return program_counter;
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}
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void Generate() {
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// Add declarations for all subroutines
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for (const auto& subroutine : subroutines) {
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shader.AddLine("bool " + subroutine.GetName() + "();");
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}
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shader.AddLine("");
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// Add the main entry point
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shader.AddLine("bool exec_shader() {");
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++shader.scope;
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CallSubroutine(GetSubroutine(main_offset, PROGRAM_END));
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--shader.scope;
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shader.AddLine("}\n");
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// Add definitions for all subroutines
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for (const auto& subroutine : subroutines) {
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std::set<u32> labels = subroutine.labels;
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shader.AddLine("bool " + subroutine.GetName() + "() {");
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++shader.scope;
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if (labels.empty()) {
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if (CompileRange(subroutine.begin, subroutine.end) != PROGRAM_END) {
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shader.AddLine("return false;");
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}
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} else {
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labels.insert(subroutine.begin);
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shader.AddLine("uint jmp_to = " + std::to_string(subroutine.begin) + "u;");
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shader.AddLine("while (true) {");
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++shader.scope;
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shader.AddLine("switch (jmp_to) {");
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for (auto label : labels) {
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shader.AddLine("case " + std::to_string(label) + "u: {");
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++shader.scope;
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auto next_it = labels.lower_bound(label + 1);
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u32 next_label = next_it == labels.end() ? subroutine.end : *next_it;
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u32 compile_end = CompileRange(label, next_label);
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if (compile_end > next_label && compile_end != PROGRAM_END) {
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// This happens only when there is a label inside a IF/LOOP block
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shader.AddLine("{ jmp_to = " + std::to_string(compile_end) + "u; break; }");
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labels.emplace(compile_end);
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}
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--shader.scope;
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shader.AddLine("}");
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}
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shader.AddLine("default: return false;");
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shader.AddLine("}");
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--shader.scope;
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shader.AddLine("}");
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shader.AddLine("return false;");
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}
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--shader.scope;
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shader.AddLine("}\n");
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DEBUG_ASSERT(shader.scope == 0);
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}
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GenerateDeclarations();
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}
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/// Add declarations for registers
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void GenerateDeclarations() {
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for (const auto& reg : declr_register) {
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declarations.AddLine("float " + reg + " = 0.0;");
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}
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declarations.AddLine("");
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for (const auto& index : declr_input_attribute) {
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// TODO(bunnei): Use proper number of elements for these
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declarations.AddLine(
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"layout(location = " + std::to_string(static_cast<u32>(index) - 8) + ") in vec4 " +
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GetInputAttribute(index) + ";");
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}
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declarations.AddLine("");
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for (const auto& index : declr_output_attribute) {
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// TODO(bunnei): Use proper number of elements for these
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declarations.AddLine(
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"layout(location = " + std::to_string(static_cast<u32>(index) - 8) + ") out vec4 " +
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GetOutputAttribute(index) + ";");
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}
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declarations.AddLine("");
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}
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private:
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@ -139,9 +431,17 @@ private:
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const u32 main_offset;
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ShaderWriter shader;
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ShaderWriter declarations;
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void Generate() {}
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};
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// Declarations
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std::set<std::string> declr_register;
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std::set<Attribute::Index> declr_input_attribute;
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std::set<Attribute::Index> declr_output_attribute;
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}; // namespace Decompiler
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std::string GetCommonDeclarations() {
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return "bool exec_shader();";
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}
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boost::optional<std::string> DecompileProgram(const ProgramCode& program_code, u32 main_offset) {
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try {
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}
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} // namespace Decompiler
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} // namespace Shader
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} // namespace Tegra
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} // namespace GLShader
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@ -7,18 +7,14 @@
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#include <string>
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#include <boost/optional.hpp>
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#include "common/common_types.h"
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#include "video_core/renderer_opengl/gl_shader_gen.h"
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namespace Tegra {
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namespace Shader {
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namespace GLShader {
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namespace Decompiler {
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constexpr size_t MAX_PROGRAM_CODE_LENGTH{0x100};
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constexpr size_t MAX_SWIZZLE_DATA_LENGTH{0x100};
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using ProgramCode = std::array<u64, MAX_PROGRAM_CODE_LENGTH>;
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std::string GetCommonDeclarations();
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boost::optional<std::string> DecompileProgram(const ProgramCode& program_code, u32 main_offset);
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} // namespace Decompiler
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} // namespace Shader
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} // namespace Tegra
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} // namespace GLShader
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