mirror of
https://github.com/yuzu-emu/yuzu-android.git
synced 2024-12-26 12:05:45 +00:00
fixed_pipeline_state: Add requirements for VK_EXT_extended_dynamic_state
This moves dynamic state present in VK_EXT_extended_dynamic_state to a separate structure in FixedPipelineState. This is structure is at the bottom allowing us to hash and memcmp only when the extension is not supported.
This commit is contained in:
parent
7527402a46
commit
c387a72c76
|
@ -39,28 +39,21 @@ constexpr std::array POLYGON_OFFSET_ENABLE_LUT = {
|
||||||
|
|
||||||
} // Anonymous namespace
|
} // Anonymous namespace
|
||||||
|
|
||||||
void FixedPipelineState::DepthStencil::Fill(const Maxwell& regs) noexcept {
|
void FixedPipelineState::VertexInput::Fill(const Maxwell& regs) noexcept {
|
||||||
raw = 0;
|
for (std::size_t index = 0; index < Maxwell::NumVertexAttributes; ++index) {
|
||||||
front.action_stencil_fail.Assign(PackStencilOp(regs.stencil_front_op_fail));
|
const auto& input = regs.vertex_attrib_format[index];
|
||||||
front.action_depth_fail.Assign(PackStencilOp(regs.stencil_front_op_zfail));
|
auto& attribute = attributes[index];
|
||||||
front.action_depth_pass.Assign(PackStencilOp(regs.stencil_front_op_zpass));
|
attribute.raw = 0;
|
||||||
front.test_func.Assign(PackComparisonOp(regs.stencil_front_func_func));
|
attribute.enabled.Assign(input.IsConstant() ? 0 : 1);
|
||||||
if (regs.stencil_two_side_enable) {
|
attribute.buffer.Assign(input.buffer);
|
||||||
back.action_stencil_fail.Assign(PackStencilOp(regs.stencil_back_op_fail));
|
attribute.offset.Assign(input.offset);
|
||||||
back.action_depth_fail.Assign(PackStencilOp(regs.stencil_back_op_zfail));
|
attribute.type.Assign(static_cast<u32>(input.type.Value()));
|
||||||
back.action_depth_pass.Assign(PackStencilOp(regs.stencil_back_op_zpass));
|
attribute.size.Assign(static_cast<u32>(input.size.Value()));
|
||||||
back.test_func.Assign(PackComparisonOp(regs.stencil_back_func_func));
|
}
|
||||||
} else {
|
for (std::size_t index = 0; index < Maxwell::NumVertexArrays; ++index) {
|
||||||
back.action_stencil_fail.Assign(front.action_stencil_fail);
|
binding_divisors[index] =
|
||||||
back.action_depth_fail.Assign(front.action_depth_fail);
|
regs.instanced_arrays.IsInstancingEnabled(index) ? regs.vertex_array[index].divisor : 0;
|
||||||
back.action_depth_pass.Assign(front.action_depth_pass);
|
|
||||||
back.test_func.Assign(front.test_func);
|
|
||||||
}
|
}
|
||||||
depth_test_enable.Assign(regs.depth_test_enable);
|
|
||||||
depth_write_enable.Assign(regs.depth_write_enabled);
|
|
||||||
depth_bounds_enable.Assign(regs.depth_bounds_enable);
|
|
||||||
stencil_enable.Assign(regs.stencil_enable);
|
|
||||||
depth_test_func.Assign(PackComparisonOp(regs.depth_test_func));
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void FixedPipelineState::Rasterizer::Fill(const Maxwell& regs) noexcept {
|
void FixedPipelineState::Rasterizer::Fill(const Maxwell& regs) noexcept {
|
||||||
|
@ -70,21 +63,11 @@ void FixedPipelineState::Rasterizer::Fill(const Maxwell& regs) noexcept {
|
||||||
regs.polygon_offset_fill_enable};
|
regs.polygon_offset_fill_enable};
|
||||||
const u32 topology_index = static_cast<u32>(regs.draw.topology.Value());
|
const u32 topology_index = static_cast<u32>(regs.draw.topology.Value());
|
||||||
|
|
||||||
u32 packed_front_face = PackFrontFace(regs.front_face);
|
|
||||||
if (regs.screen_y_control.triangle_rast_flip != 0) {
|
|
||||||
// Flip front face
|
|
||||||
packed_front_face = 1 - packed_front_face;
|
|
||||||
}
|
|
||||||
|
|
||||||
raw = 0;
|
raw = 0;
|
||||||
topology.Assign(topology_index);
|
|
||||||
primitive_restart_enable.Assign(regs.primitive_restart.enabled != 0 ? 1 : 0);
|
primitive_restart_enable.Assign(regs.primitive_restart.enabled != 0 ? 1 : 0);
|
||||||
cull_enable.Assign(regs.cull_test_enabled != 0 ? 1 : 0);
|
|
||||||
depth_bias_enable.Assign(enabled_lut[POLYGON_OFFSET_ENABLE_LUT[topology_index]] != 0 ? 1 : 0);
|
depth_bias_enable.Assign(enabled_lut[POLYGON_OFFSET_ENABLE_LUT[topology_index]] != 0 ? 1 : 0);
|
||||||
depth_clamp_disabled.Assign(regs.view_volume_clip_control.depth_clamp_disabled.Value());
|
depth_clamp_disabled.Assign(regs.view_volume_clip_control.depth_clamp_disabled.Value());
|
||||||
ndc_minus_one_to_one.Assign(regs.depth_mode == Maxwell::DepthMode::MinusOneToOne ? 1 : 0);
|
ndc_minus_one_to_one.Assign(regs.depth_mode == Maxwell::DepthMode::MinusOneToOne ? 1 : 0);
|
||||||
cull_face.Assign(PackCullFace(regs.cull_face));
|
|
||||||
front_face.Assign(packed_front_face);
|
|
||||||
polygon_mode.Assign(PackPolygonMode(regs.polygon_mode_front));
|
polygon_mode.Assign(PackPolygonMode(regs.polygon_mode_front));
|
||||||
patch_control_points_minus_one.Assign(regs.patch_vertices - 1);
|
patch_control_points_minus_one.Assign(regs.patch_vertices - 1);
|
||||||
tessellation_primitive.Assign(static_cast<u32>(regs.tess_mode.prim.Value()));
|
tessellation_primitive.Assign(static_cast<u32>(regs.tess_mode.prim.Value()));
|
||||||
|
@ -147,11 +130,56 @@ void FixedPipelineState::BlendingAttachment::Fill(const Maxwell& regs, std::size
|
||||||
enable.Assign(1);
|
enable.Assign(1);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void FixedPipelineState::DynamicState::Fill(const Maxwell& regs) {
|
||||||
|
const u32 topology_index = static_cast<u32>(regs.draw.topology.Value());
|
||||||
|
u32 packed_front_face = PackFrontFace(regs.front_face);
|
||||||
|
if (regs.screen_y_control.triangle_rast_flip != 0) {
|
||||||
|
// Flip front face
|
||||||
|
packed_front_face = 1 - packed_front_face;
|
||||||
|
}
|
||||||
|
|
||||||
|
raw1 = 0;
|
||||||
|
raw2 = 0;
|
||||||
|
front.action_stencil_fail.Assign(PackStencilOp(regs.stencil_front_op_fail));
|
||||||
|
front.action_depth_fail.Assign(PackStencilOp(regs.stencil_front_op_zfail));
|
||||||
|
front.action_depth_pass.Assign(PackStencilOp(regs.stencil_front_op_zpass));
|
||||||
|
front.test_func.Assign(PackComparisonOp(regs.stencil_front_func_func));
|
||||||
|
if (regs.stencil_two_side_enable) {
|
||||||
|
back.action_stencil_fail.Assign(PackStencilOp(regs.stencil_back_op_fail));
|
||||||
|
back.action_depth_fail.Assign(PackStencilOp(regs.stencil_back_op_zfail));
|
||||||
|
back.action_depth_pass.Assign(PackStencilOp(regs.stencil_back_op_zpass));
|
||||||
|
back.test_func.Assign(PackComparisonOp(regs.stencil_back_func_func));
|
||||||
|
} else {
|
||||||
|
back.action_stencil_fail.Assign(front.action_stencil_fail);
|
||||||
|
back.action_depth_fail.Assign(front.action_depth_fail);
|
||||||
|
back.action_depth_pass.Assign(front.action_depth_pass);
|
||||||
|
back.test_func.Assign(front.test_func);
|
||||||
|
}
|
||||||
|
stencil_enable.Assign(regs.stencil_enable);
|
||||||
|
depth_write_enable.Assign(regs.depth_write_enabled);
|
||||||
|
depth_bounds_enable.Assign(regs.depth_bounds_enable);
|
||||||
|
depth_test_enable.Assign(regs.depth_test_enable);
|
||||||
|
front_face.Assign(packed_front_face);
|
||||||
|
depth_test_func.Assign(PackComparisonOp(regs.depth_test_func));
|
||||||
|
topology.Assign(topology_index);
|
||||||
|
cull_face.Assign(PackCullFace(regs.cull_face));
|
||||||
|
cull_enable.Assign(regs.cull_test_enabled != 0 ? 1 : 0);
|
||||||
|
|
||||||
|
for (std::size_t index = 0; index < Maxwell::NumVertexArrays; ++index) {
|
||||||
|
const auto& input = regs.vertex_array[index];
|
||||||
|
VertexBinding& binding = vertex_bindings[index];
|
||||||
|
binding.raw = 0;
|
||||||
|
binding.enabled.Assign(input.IsEnabled() ? 1 : 0);
|
||||||
|
binding.stride.Assign(static_cast<u16>(input.stride.Value()));
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
void FixedPipelineState::Fill(const Maxwell& regs) {
|
void FixedPipelineState::Fill(const Maxwell& regs) {
|
||||||
|
vertex_input.Fill(regs);
|
||||||
rasterizer.Fill(regs);
|
rasterizer.Fill(regs);
|
||||||
depth_stencil.Fill(regs);
|
|
||||||
color_blending.Fill(regs);
|
color_blending.Fill(regs);
|
||||||
viewport_swizzles.Fill(regs);
|
viewport_swizzles.Fill(regs);
|
||||||
|
dynamic_state.Fill(regs);
|
||||||
}
|
}
|
||||||
|
|
||||||
std::size_t FixedPipelineState::Hash() const noexcept {
|
std::size_t FixedPipelineState::Hash() const noexcept {
|
||||||
|
|
|
@ -60,14 +60,6 @@ struct FixedPipelineState {
|
||||||
|
|
||||||
void Fill(const Maxwell& regs, std::size_t index);
|
void Fill(const Maxwell& regs, std::size_t index);
|
||||||
|
|
||||||
std::size_t Hash() const noexcept;
|
|
||||||
|
|
||||||
bool operator==(const BlendingAttachment& rhs) const noexcept;
|
|
||||||
|
|
||||||
bool operator!=(const BlendingAttachment& rhs) const noexcept {
|
|
||||||
return !operator==(rhs);
|
|
||||||
}
|
|
||||||
|
|
||||||
constexpr std::array<bool, 4> Mask() const noexcept {
|
constexpr std::array<bool, 4> Mask() const noexcept {
|
||||||
return {mask_r != 0, mask_g != 0, mask_b != 0, mask_a != 0};
|
return {mask_r != 0, mask_g != 0, mask_b != 0, mask_a != 0};
|
||||||
}
|
}
|
||||||
|
@ -98,12 +90,6 @@ struct FixedPipelineState {
|
||||||
};
|
};
|
||||||
|
|
||||||
struct VertexInput {
|
struct VertexInput {
|
||||||
union Binding {
|
|
||||||
u16 raw;
|
|
||||||
BitField<0, 1, u16> enabled;
|
|
||||||
BitField<1, 12, u16> stride;
|
|
||||||
};
|
|
||||||
|
|
||||||
union Attribute {
|
union Attribute {
|
||||||
u32 raw;
|
u32 raw;
|
||||||
BitField<0, 1, u32> enabled;
|
BitField<0, 1, u32> enabled;
|
||||||
|
@ -121,71 +107,47 @@ struct FixedPipelineState {
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
|
|
||||||
std::array<Binding, Maxwell::NumVertexArrays> bindings;
|
|
||||||
std::array<u32, Maxwell::NumVertexArrays> binding_divisors;
|
std::array<u32, Maxwell::NumVertexArrays> binding_divisors;
|
||||||
std::array<Attribute, Maxwell::NumVertexAttributes> attributes;
|
std::array<Attribute, Maxwell::NumVertexAttributes> attributes;
|
||||||
|
|
||||||
void SetBinding(std::size_t index, bool enabled, u32 stride, u32 divisor) noexcept {
|
void Fill(const Maxwell& regs) noexcept;
|
||||||
auto& binding = bindings[index];
|
|
||||||
binding.raw = 0;
|
|
||||||
binding.enabled.Assign(enabled ? 1 : 0);
|
|
||||||
binding.stride.Assign(static_cast<u16>(stride));
|
|
||||||
binding_divisors[index] = divisor;
|
|
||||||
}
|
|
||||||
|
|
||||||
void SetAttribute(std::size_t index, bool enabled, u32 buffer, u32 offset,
|
|
||||||
Maxwell::VertexAttribute::Type type,
|
|
||||||
Maxwell::VertexAttribute::Size size) noexcept {
|
|
||||||
auto& attribute = attributes[index];
|
|
||||||
attribute.raw = 0;
|
|
||||||
attribute.enabled.Assign(enabled ? 1 : 0);
|
|
||||||
attribute.buffer.Assign(buffer);
|
|
||||||
attribute.offset.Assign(offset);
|
|
||||||
attribute.type.Assign(static_cast<u32>(type));
|
|
||||||
attribute.size.Assign(static_cast<u32>(size));
|
|
||||||
}
|
|
||||||
};
|
};
|
||||||
|
|
||||||
struct Rasterizer {
|
struct Rasterizer {
|
||||||
union {
|
union {
|
||||||
u32 raw;
|
u32 raw;
|
||||||
BitField<0, 4, u32> topology;
|
BitField<0, 1, u32> primitive_restart_enable;
|
||||||
BitField<4, 1, u32> primitive_restart_enable;
|
BitField<1, 1, u32> depth_bias_enable;
|
||||||
BitField<5, 1, u32> cull_enable;
|
BitField<2, 1, u32> depth_clamp_disabled;
|
||||||
BitField<6, 1, u32> depth_bias_enable;
|
BitField<3, 1, u32> ndc_minus_one_to_one;
|
||||||
BitField<7, 1, u32> depth_clamp_disabled;
|
BitField<4, 2, u32> polygon_mode;
|
||||||
BitField<8, 1, u32> ndc_minus_one_to_one;
|
BitField<6, 5, u32> patch_control_points_minus_one;
|
||||||
BitField<9, 2, u32> cull_face;
|
BitField<11, 2, u32> tessellation_primitive;
|
||||||
BitField<11, 1, u32> front_face;
|
BitField<13, 2, u32> tessellation_spacing;
|
||||||
BitField<12, 2, u32> polygon_mode;
|
BitField<15, 1, u32> tessellation_clockwise;
|
||||||
BitField<14, 5, u32> patch_control_points_minus_one;
|
BitField<16, 1, u32> logic_op_enable;
|
||||||
BitField<19, 2, u32> tessellation_primitive;
|
BitField<17, 4, u32> logic_op;
|
||||||
BitField<21, 2, u32> tessellation_spacing;
|
BitField<21, 1, u32> rasterize_enable;
|
||||||
BitField<23, 1, u32> tessellation_clockwise;
|
|
||||||
BitField<24, 1, u32> logic_op_enable;
|
|
||||||
BitField<25, 4, u32> logic_op;
|
|
||||||
BitField<29, 1, u32> rasterize_enable;
|
|
||||||
};
|
};
|
||||||
|
|
||||||
// TODO(Rodrigo): Move this to push constants
|
// TODO(Rodrigo): Move this to push constants
|
||||||
u32 point_size;
|
u32 point_size;
|
||||||
|
|
||||||
void Fill(const Maxwell& regs) noexcept;
|
void Fill(const Maxwell& regs) noexcept;
|
||||||
|
|
||||||
constexpr Maxwell::PrimitiveTopology Topology() const noexcept {
|
|
||||||
return static_cast<Maxwell::PrimitiveTopology>(topology.Value());
|
|
||||||
}
|
|
||||||
|
|
||||||
Maxwell::CullFace CullFace() const noexcept {
|
|
||||||
return UnpackCullFace(cull_face.Value());
|
|
||||||
}
|
|
||||||
|
|
||||||
Maxwell::FrontFace FrontFace() const noexcept {
|
|
||||||
return UnpackFrontFace(front_face.Value());
|
|
||||||
}
|
|
||||||
};
|
};
|
||||||
|
|
||||||
struct DepthStencil {
|
struct ColorBlending {
|
||||||
|
std::array<BlendingAttachment, Maxwell::NumRenderTargets> attachments;
|
||||||
|
|
||||||
|
void Fill(const Maxwell& regs) noexcept;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct ViewportSwizzles {
|
||||||
|
std::array<u16, Maxwell::NumViewports> swizzles;
|
||||||
|
|
||||||
|
void Fill(const Maxwell& regs) noexcept;
|
||||||
|
};
|
||||||
|
|
||||||
template <std::size_t Position>
|
template <std::size_t Position>
|
||||||
union StencilFace {
|
union StencilFace {
|
||||||
BitField<Position + 0, 3, u32> action_stencil_fail;
|
BitField<Position + 0, 3, u32> action_stencil_fail;
|
||||||
|
@ -210,41 +172,56 @@ struct FixedPipelineState {
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
|
|
||||||
union {
|
union VertexBinding {
|
||||||
u32 raw;
|
u16 raw;
|
||||||
StencilFace<0> front;
|
BitField<0, 12, u16> stride;
|
||||||
StencilFace<12> back;
|
BitField<12, 1, u16> enabled;
|
||||||
BitField<24, 1, u32> depth_test_enable;
|
|
||||||
BitField<25, 1, u32> depth_write_enable;
|
|
||||||
BitField<26, 1, u32> depth_bounds_enable;
|
|
||||||
BitField<27, 1, u32> stencil_enable;
|
|
||||||
BitField<28, 3, u32> depth_test_func;
|
|
||||||
};
|
};
|
||||||
|
|
||||||
void Fill(const Maxwell& regs) noexcept;
|
struct DynamicState {
|
||||||
|
union {
|
||||||
|
u32 raw1;
|
||||||
|
StencilFace<0> front;
|
||||||
|
StencilFace<12> back;
|
||||||
|
BitField<24, 1, u32> stencil_enable;
|
||||||
|
BitField<25, 1, u32> depth_write_enable;
|
||||||
|
BitField<26, 1, u32> depth_bounds_enable;
|
||||||
|
BitField<27, 1, u32> depth_test_enable;
|
||||||
|
BitField<28, 1, u32> front_face;
|
||||||
|
BitField<29, 3, u32> depth_test_func;
|
||||||
|
};
|
||||||
|
union {
|
||||||
|
u32 raw2;
|
||||||
|
BitField<0, 4, u32> topology;
|
||||||
|
BitField<4, 2, u32> cull_face;
|
||||||
|
BitField<6, 1, u32> cull_enable;
|
||||||
|
};
|
||||||
|
std::array<VertexBinding, Maxwell::NumVertexArrays> vertex_bindings;
|
||||||
|
|
||||||
|
void Fill(const Maxwell& regs);
|
||||||
|
|
||||||
Maxwell::ComparisonOp DepthTestFunc() const noexcept {
|
Maxwell::ComparisonOp DepthTestFunc() const noexcept {
|
||||||
return UnpackComparisonOp(depth_test_func);
|
return UnpackComparisonOp(depth_test_func);
|
||||||
}
|
}
|
||||||
};
|
|
||||||
|
|
||||||
struct ColorBlending {
|
Maxwell::CullFace CullFace() const noexcept {
|
||||||
std::array<BlendingAttachment, Maxwell::NumRenderTargets> attachments;
|
return UnpackCullFace(cull_face.Value());
|
||||||
|
}
|
||||||
|
|
||||||
void Fill(const Maxwell& regs) noexcept;
|
Maxwell::FrontFace FrontFace() const noexcept {
|
||||||
};
|
return UnpackFrontFace(front_face.Value());
|
||||||
|
}
|
||||||
|
|
||||||
struct ViewportSwizzles {
|
constexpr Maxwell::PrimitiveTopology Topology() const noexcept {
|
||||||
std::array<u16, Maxwell::NumViewports> swizzles;
|
return static_cast<Maxwell::PrimitiveTopology>(topology.Value());
|
||||||
|
}
|
||||||
void Fill(const Maxwell& regs) noexcept;
|
|
||||||
};
|
};
|
||||||
|
|
||||||
VertexInput vertex_input;
|
VertexInput vertex_input;
|
||||||
Rasterizer rasterizer;
|
Rasterizer rasterizer;
|
||||||
DepthStencil depth_stencil;
|
|
||||||
ColorBlending color_blending;
|
ColorBlending color_blending;
|
||||||
ViewportSwizzles viewport_swizzles;
|
ViewportSwizzles viewport_swizzles;
|
||||||
|
DynamicState dynamic_state;
|
||||||
|
|
||||||
void Fill(const Maxwell& regs);
|
void Fill(const Maxwell& regs);
|
||||||
|
|
||||||
|
|
|
@ -177,15 +177,15 @@ std::vector<vk::ShaderModule> VKGraphicsPipeline::CreateShaderModules(
|
||||||
vk::Pipeline VKGraphicsPipeline::CreatePipeline(const RenderPassParams& renderpass_params,
|
vk::Pipeline VKGraphicsPipeline::CreatePipeline(const RenderPassParams& renderpass_params,
|
||||||
const SPIRVProgram& program) const {
|
const SPIRVProgram& program) const {
|
||||||
const auto& vi = fixed_state.vertex_input;
|
const auto& vi = fixed_state.vertex_input;
|
||||||
const auto& ds = fixed_state.depth_stencil;
|
|
||||||
const auto& cd = fixed_state.color_blending;
|
const auto& cd = fixed_state.color_blending;
|
||||||
const auto& rs = fixed_state.rasterizer;
|
const auto& rs = fixed_state.rasterizer;
|
||||||
|
const auto& ds = fixed_state.dynamic_state;
|
||||||
const auto& viewport_swizzles = fixed_state.viewport_swizzles.swizzles;
|
const auto& viewport_swizzles = fixed_state.viewport_swizzles.swizzles;
|
||||||
|
|
||||||
std::vector<VkVertexInputBindingDescription> vertex_bindings;
|
std::vector<VkVertexInputBindingDescription> vertex_bindings;
|
||||||
std::vector<VkVertexInputBindingDivisorDescriptionEXT> vertex_binding_divisors;
|
std::vector<VkVertexInputBindingDivisorDescriptionEXT> vertex_binding_divisors;
|
||||||
for (std::size_t index = 0; index < std::size(vi.bindings); ++index) {
|
for (std::size_t index = 0; index < Maxwell::NumVertexArrays; ++index) {
|
||||||
const auto& binding = vi.bindings[index];
|
const auto& binding = ds.vertex_bindings[index];
|
||||||
if (!binding.enabled) {
|
if (!binding.enabled) {
|
||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
|
@ -244,7 +244,7 @@ vk::Pipeline VKGraphicsPipeline::CreatePipeline(const RenderPassParams& renderpa
|
||||||
input_assembly_ci.sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO;
|
input_assembly_ci.sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO;
|
||||||
input_assembly_ci.pNext = nullptr;
|
input_assembly_ci.pNext = nullptr;
|
||||||
input_assembly_ci.flags = 0;
|
input_assembly_ci.flags = 0;
|
||||||
input_assembly_ci.topology = MaxwellToVK::PrimitiveTopology(device, rs.Topology());
|
input_assembly_ci.topology = MaxwellToVK::PrimitiveTopology(device, ds.Topology());
|
||||||
input_assembly_ci.primitiveRestartEnable =
|
input_assembly_ci.primitiveRestartEnable =
|
||||||
rs.primitive_restart_enable != 0 && SupportsPrimitiveRestart(input_assembly_ci.topology);
|
rs.primitive_restart_enable != 0 && SupportsPrimitiveRestart(input_assembly_ci.topology);
|
||||||
|
|
||||||
|
@ -284,8 +284,8 @@ vk::Pipeline VKGraphicsPipeline::CreatePipeline(const RenderPassParams& renderpa
|
||||||
rasterization_ci.rasterizerDiscardEnable = rs.rasterize_enable == 0 ? VK_TRUE : VK_FALSE;
|
rasterization_ci.rasterizerDiscardEnable = rs.rasterize_enable == 0 ? VK_TRUE : VK_FALSE;
|
||||||
rasterization_ci.polygonMode = VK_POLYGON_MODE_FILL;
|
rasterization_ci.polygonMode = VK_POLYGON_MODE_FILL;
|
||||||
rasterization_ci.cullMode =
|
rasterization_ci.cullMode =
|
||||||
rs.cull_enable ? MaxwellToVK::CullFace(rs.CullFace()) : VK_CULL_MODE_NONE;
|
ds.cull_enable ? MaxwellToVK::CullFace(ds.CullFace()) : VK_CULL_MODE_NONE;
|
||||||
rasterization_ci.frontFace = MaxwellToVK::FrontFace(rs.FrontFace());
|
rasterization_ci.frontFace = MaxwellToVK::FrontFace(ds.FrontFace());
|
||||||
rasterization_ci.depthBiasEnable = rs.depth_bias_enable;
|
rasterization_ci.depthBiasEnable = rs.depth_bias_enable;
|
||||||
rasterization_ci.depthBiasConstantFactor = 0.0f;
|
rasterization_ci.depthBiasConstantFactor = 0.0f;
|
||||||
rasterization_ci.depthBiasClamp = 0.0f;
|
rasterization_ci.depthBiasClamp = 0.0f;
|
||||||
|
|
|
@ -312,7 +312,7 @@ VKPipelineCache::DecompileShaders(const GraphicsPipelineCacheKey& key) {
|
||||||
const auto& gpu = system.GPU().Maxwell3D();
|
const auto& gpu = system.GPU().Maxwell3D();
|
||||||
|
|
||||||
Specialization specialization;
|
Specialization specialization;
|
||||||
if (fixed_state.rasterizer.Topology() == Maxwell::PrimitiveTopology::Points) {
|
if (fixed_state.dynamic_state.Topology() == Maxwell::PrimitiveTopology::Points) {
|
||||||
float point_size;
|
float point_size;
|
||||||
std::memcpy(&point_size, &fixed_state.rasterizer.point_size, sizeof(float));
|
std::memcpy(&point_size, &fixed_state.rasterizer.point_size, sizeof(float));
|
||||||
specialization.point_size = point_size;
|
specialization.point_size = point_size;
|
||||||
|
|
|
@ -44,10 +44,10 @@ class VKUpdateDescriptorQueue;
|
||||||
using Maxwell = Tegra::Engines::Maxwell3D::Regs;
|
using Maxwell = Tegra::Engines::Maxwell3D::Regs;
|
||||||
|
|
||||||
struct GraphicsPipelineCacheKey {
|
struct GraphicsPipelineCacheKey {
|
||||||
FixedPipelineState fixed_state;
|
|
||||||
RenderPassParams renderpass_params;
|
RenderPassParams renderpass_params;
|
||||||
|
u32 padding;
|
||||||
std::array<GPUVAddr, Maxwell::MaxShaderProgram> shaders;
|
std::array<GPUVAddr, Maxwell::MaxShaderProgram> shaders;
|
||||||
u64 padding; // This is necessary for unique object representations
|
FixedPipelineState fixed_state;
|
||||||
|
|
||||||
std::size_t Hash() const noexcept;
|
std::size_t Hash() const noexcept;
|
||||||
|
|
||||||
|
|
|
@ -822,7 +822,7 @@ RasterizerVulkan::DrawParameters RasterizerVulkan::SetupGeometry(FixedPipelineSt
|
||||||
const auto& gpu = system.GPU().Maxwell3D();
|
const auto& gpu = system.GPU().Maxwell3D();
|
||||||
const auto& regs = gpu.regs;
|
const auto& regs = gpu.regs;
|
||||||
|
|
||||||
SetupVertexArrays(fixed_state.vertex_input, buffer_bindings);
|
SetupVertexArrays(buffer_bindings);
|
||||||
|
|
||||||
const u32 base_instance = regs.vb_base_instance;
|
const u32 base_instance = regs.vb_base_instance;
|
||||||
const u32 num_instances = is_instanced ? gpu.mme_draw.instance_count : 1;
|
const u32 num_instances = is_instanced ? gpu.mme_draw.instance_count : 1;
|
||||||
|
@ -940,30 +940,14 @@ void RasterizerVulkan::EndTransformFeedback() {
|
||||||
[](vk::CommandBuffer cmdbuf) { cmdbuf.EndTransformFeedbackEXT(0, 0, nullptr, nullptr); });
|
[](vk::CommandBuffer cmdbuf) { cmdbuf.EndTransformFeedbackEXT(0, 0, nullptr, nullptr); });
|
||||||
}
|
}
|
||||||
|
|
||||||
void RasterizerVulkan::SetupVertexArrays(FixedPipelineState::VertexInput& vertex_input,
|
void RasterizerVulkan::SetupVertexArrays(BufferBindings& buffer_bindings) {
|
||||||
BufferBindings& buffer_bindings) {
|
|
||||||
const auto& regs = system.GPU().Maxwell3D().regs;
|
const auto& regs = system.GPU().Maxwell3D().regs;
|
||||||
|
|
||||||
for (std::size_t index = 0; index < Maxwell::NumVertexAttributes; ++index) {
|
|
||||||
const auto& attrib = regs.vertex_attrib_format[index];
|
|
||||||
if (attrib.IsConstant()) {
|
|
||||||
vertex_input.SetAttribute(index, false, 0, 0, {}, {});
|
|
||||||
continue;
|
|
||||||
}
|
|
||||||
vertex_input.SetAttribute(index, true, attrib.buffer, attrib.offset, attrib.type.Value(),
|
|
||||||
attrib.size.Value());
|
|
||||||
}
|
|
||||||
|
|
||||||
for (std::size_t index = 0; index < Maxwell::NumVertexArrays; ++index) {
|
for (std::size_t index = 0; index < Maxwell::NumVertexArrays; ++index) {
|
||||||
const auto& vertex_array = regs.vertex_array[index];
|
const auto& vertex_array = regs.vertex_array[index];
|
||||||
if (!vertex_array.IsEnabled()) {
|
if (!vertex_array.IsEnabled()) {
|
||||||
vertex_input.SetBinding(index, false, 0, 0);
|
|
||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
vertex_input.SetBinding(
|
|
||||||
index, true, vertex_array.stride,
|
|
||||||
regs.instanced_arrays.IsInstancingEnabled(index) ? vertex_array.divisor : 0);
|
|
||||||
|
|
||||||
const GPUVAddr start{vertex_array.StartAddress()};
|
const GPUVAddr start{vertex_array.StartAddress()};
|
||||||
const GPUVAddr end{regs.vertex_array_limit[index].LimitAddress()};
|
const GPUVAddr end{regs.vertex_array_limit[index].LimitAddress()};
|
||||||
|
|
||||||
|
|
|
@ -185,8 +185,7 @@ private:
|
||||||
|
|
||||||
bool WalkAttachmentOverlaps(const CachedSurfaceView& attachment);
|
bool WalkAttachmentOverlaps(const CachedSurfaceView& attachment);
|
||||||
|
|
||||||
void SetupVertexArrays(FixedPipelineState::VertexInput& vertex_input,
|
void SetupVertexArrays(BufferBindings& buffer_bindings);
|
||||||
BufferBindings& buffer_bindings);
|
|
||||||
|
|
||||||
void SetupIndexBuffer(BufferBindings& buffer_bindings, DrawParameters& params, bool is_indexed);
|
void SetupIndexBuffer(BufferBindings& buffer_bindings, DrawParameters& params, bool is_indexed);
|
||||||
|
|
||||||
|
|
Loading…
Reference in a new issue