mirror of
https://github.com/yuzu-emu/yuzu-android.git
synced 2024-12-27 09:15:40 +00:00
Merge pull request #750 from lioncash/ctx
arm_interface: Remove unused tls_address member of ThreadContext
This commit is contained in:
commit
de7cb91995
|
@ -20,9 +20,6 @@ public:
|
||||||
u64 cpsr;
|
u64 cpsr;
|
||||||
std::array<u128, 32> fpu_registers;
|
std::array<u128, 32> fpu_registers;
|
||||||
u64 fpscr;
|
u64 fpscr;
|
||||||
|
|
||||||
// TODO(bunnei): Fix once we have proper support for tpidrro_el0, etc. in the JIT
|
|
||||||
VAddr tls_address;
|
|
||||||
};
|
};
|
||||||
|
|
||||||
/// Runs the CPU until an event happens
|
/// Runs the CPU until an event happens
|
||||||
|
|
|
@ -211,7 +211,6 @@ void ARM_Dynarmic::SaveContext(ARM_Interface::ThreadContext& ctx) {
|
||||||
ctx.cpsr = jit->GetPstate();
|
ctx.cpsr = jit->GetPstate();
|
||||||
ctx.fpu_registers = jit->GetVectors();
|
ctx.fpu_registers = jit->GetVectors();
|
||||||
ctx.fpscr = jit->GetFpcr();
|
ctx.fpscr = jit->GetFpcr();
|
||||||
ctx.tls_address = cb->tpidrro_el0;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void ARM_Dynarmic::LoadContext(const ARM_Interface::ThreadContext& ctx) {
|
void ARM_Dynarmic::LoadContext(const ARM_Interface::ThreadContext& ctx) {
|
||||||
|
@ -221,7 +220,6 @@ void ARM_Dynarmic::LoadContext(const ARM_Interface::ThreadContext& ctx) {
|
||||||
jit->SetPstate(static_cast<u32>(ctx.cpsr));
|
jit->SetPstate(static_cast<u32>(ctx.cpsr));
|
||||||
jit->SetVectors(ctx.fpu_registers);
|
jit->SetVectors(ctx.fpu_registers);
|
||||||
jit->SetFpcr(static_cast<u32>(ctx.fpscr));
|
jit->SetFpcr(static_cast<u32>(ctx.fpscr));
|
||||||
cb->tpidrro_el0 = ctx.tls_address;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void ARM_Dynarmic::PrepareReschedule() {
|
void ARM_Dynarmic::PrepareReschedule() {
|
||||||
|
|
|
@ -230,8 +230,6 @@ void ARM_Unicorn::SaveContext(ARM_Interface::ThreadContext& ctx) {
|
||||||
|
|
||||||
CHECKED(uc_reg_read_batch(uc, uregs, tregs, 31));
|
CHECKED(uc_reg_read_batch(uc, uregs, tregs, 31));
|
||||||
|
|
||||||
ctx.tls_address = GetTlsAddress();
|
|
||||||
|
|
||||||
for (int i = 0; i < 32; ++i) {
|
for (int i = 0; i < 32; ++i) {
|
||||||
uregs[i] = UC_ARM64_REG_Q0 + i;
|
uregs[i] = UC_ARM64_REG_Q0 + i;
|
||||||
tregs[i] = &ctx.fpu_registers[i];
|
tregs[i] = &ctx.fpu_registers[i];
|
||||||
|
@ -259,8 +257,6 @@ void ARM_Unicorn::LoadContext(const ARM_Interface::ThreadContext& ctx) {
|
||||||
|
|
||||||
CHECKED(uc_reg_write_batch(uc, uregs, tregs, 31));
|
CHECKED(uc_reg_write_batch(uc, uregs, tregs, 31));
|
||||||
|
|
||||||
SetTlsAddress(ctx.tls_address);
|
|
||||||
|
|
||||||
for (auto i = 0; i < 32; ++i) {
|
for (auto i = 0; i < 32; ++i) {
|
||||||
uregs[i] = UC_ARM64_REG_Q0 + i;
|
uregs[i] = UC_ARM64_REG_Q0 + i;
|
||||||
tregs[i] = (void*)&ctx.fpu_registers[i];
|
tregs[i] = (void*)&ctx.fpu_registers[i];
|
||||||
|
|
Loading…
Reference in a new issue