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9715 commits 1 branch 278 tags 108 MiB
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173 commits

Author SHA1 Message Date
bunnei 9afcbba8e4
Merge pull request #1527 from FernandoS27/assert-flow 
Assert Control Flow Instructions using Control Codes
 2018-11-01 00:34:56 -04:00
bunnei 86e70cf302
Merge pull request #1528 from FernandoS27/assert-control-codes 
Assert Control Codes Generation on Shader Instructions
 2018-10-31 22:34:18 -04:00
FernandoS27 5bb80ab009 Assert Control Codes Generation 2018-10-30 13:37:55 -04:00
Frederic L 7a5eda5914 global: Use std::optional instead of boost::optional (#1578) 
* get rid of boost::optional

* Remove optional references

* Use std::reference_wrapper for optional references

* Fix clang format

* Fix clang format part 2

* Adressed feedback

* Fix clang format and MacOS build
 2018-10-30 00:03:25 -04:00
FernandoS27 3aa8b644a9 Assert Control Flow Instructions using Control Codes 2018-10-28 19:16:41 -04:00
FernandoS27 ca142f35c0 Implemented LD_L and ST_L 2018-10-24 17:51:53 -04:00
FernandoS27 ed8ca608a0 Implement PointSize 2018-10-23 15:08:00 -04:00
bunnei 5716496239
Merge pull request #1519 from ReinUsesLisp/vsetp 
gl_shader_decompiler: Implement VSETP
 2018-10-23 10:22:37 -04:00
ReinUsesLisp 7d6dca0d0a gl_shader_decompiler: Implement VSETP 2018-10-23 01:07:20 -03:00
ReinUsesLisp 5dfb43531c gl_shader_decompiler: Abstract VMAD into a video subset 2018-10-23 01:07:20 -03:00
bunnei 848a49112a
Merge pull request #1512 from ReinUsesLisp/brk 
gl_shader_decompiler: Implement PBK and BRK
 2018-10-23 00:01:38 -04:00
FernandoS27 259da93567 Added Saturation to FMUL32I 2018-10-22 20:22:15 -04:00
FernandoS27 5c5b4e8e7d Fixed FSETP and FSET 2018-10-22 11:31:17 -04:00
bunnei b1f8bff7db
Merge pull request #1501 from ReinUsesLisp/half-float 
gl_shader_decompiler: Implement H* instructions
 2018-10-19 23:47:19 -04:00
ReinUsesLisp 41fb25349a gl_shader_decompiler: Implement PBK and BRK 2018-10-17 21:30:45 -03:00
ReinUsesLisp 936c36a514 shader_bytecode: Add Control Code enum 0xf 
Control Code 0xf means to unconditionally execute the instruction. This
value is passed to most BRA, EXIT and SYNC instructions (among others)
but this may not always be the case.
 2018-10-15 15:36:47 -03:00
ReinUsesLisp 6312eec5ef gl_shader_decompiler: Implement HSET2_R 2018-10-15 02:55:51 -03:00
ReinUsesLisp 4fc8ad67bf gl_shader_decompiler: Implement HSETP2_R 2018-10-15 02:55:51 -03:00
ReinUsesLisp 3d65aa4caf gl_shader_decompiler: Implement HFMA2 instructions 2018-10-15 02:55:51 -03:00
ReinUsesLisp d93cdc2750 gl_shader_decompiler: Implement HADD2_IMM and HMUL2_IMM 2018-10-15 02:07:16 -03:00
ReinUsesLisp d46e2a6e7a gl_shader_decompiler: Implement non-immediate HADD2 and HMUL2 instructions 2018-10-15 02:04:31 -03:00
ReinUsesLisp 08d751d882 gl_shader_decompiler: Setup base for half float unpacking and setting 2018-10-15 01:58:30 -03:00
ReinUsesLisp 17290a4416 gl_shader_decompiler: Implement VMAD 2018-10-11 04:15:10 -03:00
ReinUsesLisp ee4d538850 gl_shader_decompiler: Implement geometry shaders 2018-10-07 17:36:00 -03:00
Lioncash a8f5fd787f shader_bytecode: Lay out the Ipa-related enums better 
This is more consistent with the surrounding enums.
 2018-09-21 16:17:31 -04:00
Lioncash 272517cf7e shader_bytecode: Make operator== and operator!= of IpaMode const qualified 
These don't affect the state of the struct and can be const member
functions.
 2018-09-21 16:17:27 -04:00
bunnei 0284cbe7ec
Merge pull request #1279 from FernandoS27/csetp 
shader_decompiler: Implemented (Partialy) Control Codes and CSETP
 2018-09-18 22:10:48 -04:00
FernandoS27 e4bb759c4b Implemented I2I.CC on the NEU control code, used by SMO 2018-09-17 17:42:46 -04:00
FernandoS27 e2ac8fb36d Implemented CSETP 2018-09-17 17:42:44 -04:00
FernandoS27 aac77bbd18 Implemented Control Codes 2018-09-17 17:42:43 -04:00
FernandoS27 55a4756766 Added texture misc modes to texture instructions 2018-09-17 12:51:05 -04:00
bunnei 076add4ccd
Merge pull request #1326 from FearlessTobi/port-4182 
Port #4182 from Citra: "Prefix all size_t with std::"
 2018-09-17 09:51:47 -04:00
Subv c878a819d7 Shaders: Implemented multiple-word loads and stores to and from attribute memory. 
This seems to be an optimization performed by nouveau.
 2018-09-15 11:21:21 -05:00
fearlessTobi 63c2e32e20 Port #4182 from Citra: "Prefix all size_t with std::" 2018-09-15 15:21:06 +02:00
bunnei cc50857460
Merge pull request #1263 from FernandoS27/tex-mode 
shader_decompiler:  Implemented (Partially) Texture Processing Modes
 2018-09-12 16:03:34 -04:00
FernandoS27 a99d9db32f Implemented Texture Processing Modes 2018-09-12 12:28:22 -04:00
FernandoS27 3f0922715a Implemented encodings for LEA and PSET 2018-09-11 12:50:25 -04:00
FernandoS27 00131e752d Implemented TMML 2018-09-09 20:46:31 -04:00
FernandoS27 073a21ac0b Implemented TXQ dimension query type, used by SMO. 2018-09-09 11:59:01 -04:00
FernandoS27 82a313a14c Change name of TEXQ to TXQ, in order to match NVIDIA's naming 2018-09-08 18:08:57 -04:00
FernandoS27 e63b229f4a Implemented IPA Properly 2018-09-05 20:15:47 -04:00
bunnei 89be49d2f3
Merge pull request #1215 from ogniK5377/texs-nodep-assert 
Added assert for TEXS nodep
 2018-09-02 10:48:27 -04:00
bunnei 177c45e97d
Merge pull request #1214 from ogniK5377/ipa-assert 
Added better asserts to IPA, Renamed IPA modes to match mesa
 2018-09-02 10:44:43 -04:00
bunnei 9c206fe94d
Merge pull request #1216 from ogniK5377/ffma-assert 
Added FFMA asserts and missing fields
 2018-09-02 10:44:13 -04:00
David Marcec 60754b4728 Removed saturate assert 
Unneeded as we already implement it
 2018-09-01 19:33:32 +10:00
David Marcec 2edab4e840 Removed saturate assert 
Saturate already implemented
 2018-09-01 19:29:20 +10:00
David Marcec 6f8ed9508d Added FMUL asserts 2018-09-01 19:05:10 +10:00
David Marcec b89fc407d7 Added FFMA asserts 2018-09-01 18:45:14 +10:00
David Marcec 948bc87a59 Added assert for TEXS nodep 2018-09-01 17:00:01 +10:00
David Marcec ad3dca7e62 Added better asserts to IPA, Renamed IPA modes to match mesa 
IpaMode is changed to IpaInterpMode
IpaMode is suppose to be 2 bits not 3
Added IpaSampleMode
Added Saturate

Renamed modes based on
d27c791891/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp (L2530)
 2018-09-01 16:34:27 +10:00