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GPU: Implemented the F2I_R shader instruction.
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@ -173,6 +173,13 @@ enum class SubOp : u64 {
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Min = 0x8,
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};
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enum class FloatRoundingOp : u64 {
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None = 0,
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Floor = 1,
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Ceil = 2,
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Trunc = 3,
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};
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union Instruction {
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Instruction& operator=(const Instruction& instr) {
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value = instr.value;
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@ -277,11 +284,20 @@ union Instruction {
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union {
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BitField<10, 2, Register::Size> size;
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BitField<13, 1, u64> is_signed;
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BitField<12, 1, u64> is_output_signed;
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BitField<13, 1, u64> is_input_signed;
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BitField<41, 2, u64> selector;
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BitField<45, 1, u64> negate_a;
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BitField<49, 1, u64> abs_a;
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BitField<50, 1, u64> saturate_a;
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union {
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BitField<39, 2, FloatRoundingOp> rounding;
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} f2i;
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union {
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BitField<39, 4, u64> rounding;
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} f2f;
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} conversion;
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union {
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@ -535,9 +551,9 @@ private:
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INST("0100110010101---", Id::F2F_C, Type::Conversion, "F2F_C"),
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INST("0101110010101---", Id::F2F_R, Type::Conversion, "F2F_R"),
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INST("0011100-10101---", Id::F2F_IMM, Type::Conversion, "F2F_IMM"),
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INST("0100110010110---", Id::F2I_C, Type::Arithmetic, "F2I_C"),
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INST("0101110010110---", Id::F2I_R, Type::Arithmetic, "F2I_R"),
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INST("0011100-10110---", Id::F2I_IMM, Type::Arithmetic, "F2I_IMM"),
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INST("0100110010110---", Id::F2I_C, Type::Conversion, "F2I_C"),
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INST("0101110010110---", Id::F2I_R, Type::Conversion, "F2I_R"),
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INST("0011100-10110---", Id::F2I_IMM, Type::Conversion, "F2I_IMM"),
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INST("0100110010011---", Id::MOV_C, Type::Arithmetic, "MOV_C"),
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INST("0101110010011---", Id::MOV_R, Type::Arithmetic, "MOV_R"),
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INST("0011100-10011---", Id::MOV_IMM, Type::Arithmetic, "MOV_IMM"),
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@ -929,18 +929,20 @@ private:
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ASSERT_MSG(!instr.conversion.selector, "Unimplemented");
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std::string op_a =
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regs.GetRegisterAsInteger(instr.gpr20, 0, instr.conversion.is_signed);
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regs.GetRegisterAsInteger(instr.gpr20, 0, instr.conversion.is_input_signed);
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if (instr.conversion.abs_a) {
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op_a = "abs(" + op_a + ')';
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}
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regs.SetRegisterToInteger(instr.gpr0, instr.conversion.is_signed, 0, op_a, 1, 1);
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regs.SetRegisterToInteger(instr.gpr0, instr.conversion.is_output_signed, 0, op_a, 1,
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1);
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break;
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}
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case OpCode::Id::I2F_R: {
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ASSERT_MSG(!instr.conversion.selector, "Unimplemented");
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std::string op_a =
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regs.GetRegisterAsInteger(instr.gpr20, 0, instr.conversion.is_signed);
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regs.GetRegisterAsInteger(instr.gpr20, 0, instr.conversion.is_input_signed);
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if (instr.conversion.abs_a) {
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op_a = "abs(" + op_a + ')';
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@ -950,6 +952,8 @@ private:
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break;
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}
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case OpCode::Id::F2F_R: {
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// TODO(Subv): Implement rounding operations.
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ASSERT_MSG(instr.conversion.f2f.rounding == 0, "Unimplemented rounding operation");
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std::string op_a = regs.GetRegisterAsFloat(instr.gpr20);
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if (instr.conversion.abs_a) {
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@ -959,6 +963,43 @@ private:
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regs.SetRegisterToFloat(instr.gpr0, 0, op_a, 1, 1);
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break;
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}
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case OpCode::Id::F2I_R: {
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std::string op_a = regs.GetRegisterAsFloat(instr.gpr20);
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if (instr.conversion.abs_a) {
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op_a = "abs(" + op_a + ')';
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}
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using Tegra::Shader::FloatRoundingOp;
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switch (instr.conversion.f2i.rounding) {
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case FloatRoundingOp::None:
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break;
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case FloatRoundingOp::Floor:
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op_a = "floor(" + op_a + ')';
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break;
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case FloatRoundingOp::Ceil:
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op_a = "ceil(" + op_a + ')';
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break;
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case FloatRoundingOp::Trunc:
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op_a = "trunc(" + op_a + ')';
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break;
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default:
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NGLOG_CRITICAL(HW_GPU, "Unimplemented f2i rounding mode {}",
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static_cast<u32>(instr.conversion.f2i.rounding.Value()));
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UNREACHABLE();
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break;
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}
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if (instr.conversion.is_output_signed) {
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op_a = "int(" + op_a + ')';
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} else {
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op_a = "uint(" + op_a + ')';
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}
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regs.SetRegisterToInteger(instr.gpr0, instr.conversion.is_output_signed, 0, op_a, 1,
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1);
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break;
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}
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default: {
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NGLOG_CRITICAL(HW_GPU, "Unhandled conversion instruction: {}", opcode->GetName());
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UNREACHABLE();
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