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shader/registry: Cache tessellation state
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0528be5c92
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@ -48,7 +48,7 @@ struct BindlessSamplerKey {
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Tegra::Engines::SamplerDescriptor sampler;
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};
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constexpr u32 NativeVersion = 17;
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constexpr u32 NativeVersion = 18;
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ShaderCacheVersionHash GetShaderCacheVersionHash() {
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ShaderCacheVersionHash hash{};
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@ -27,6 +27,9 @@ GraphicsInfo MakeGraphicsInfo(ShaderType shader_stage, ConstBufferEngineInterfac
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GraphicsInfo info;
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info.primitive_topology = graphics.regs.draw.topology;
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info.tessellation_primitive = graphics.regs.tess_mode.prim;
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info.tessellation_spacing = graphics.regs.tess_mode.spacing;
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info.tessellation_clockwise = graphics.regs.tess_mode.cw;
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return info;
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}
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@ -26,15 +26,19 @@ using BindlessSamplerMap =
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struct GraphicsInfo {
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Tegra::Engines::Maxwell3D::Regs::PrimitiveTopology primitive_topology{};
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Tegra::Engines::Maxwell3D::Regs::TessellationPrimitive tessellation_primitive{};
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Tegra::Engines::Maxwell3D::Regs::TessellationSpacing tessellation_spacing{};
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bool tessellation_clockwise = false;
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};
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static_assert(std::is_trivially_copyable_v<GraphicsInfo>);
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static_assert(std::is_trivially_copyable_v<GraphicsInfo> &&
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std::is_standard_layout_v<GraphicsInfo>);
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struct ComputeInfo {
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std::array<u32, 3> workgroup_size{};
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u32 shared_memory_size_in_words = 0;
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u32 local_memory_size_in_words = 0;
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};
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static_assert(std::is_trivially_copyable_v<ComputeInfo>);
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static_assert(std::is_trivially_copyable_v<ComputeInfo> && std::is_standard_layout_v<ComputeInfo>);
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struct SerializedRegistryInfo {
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VideoCore::GuestDriverProfile guest_driver_profile;
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