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https://github.com/yuzu-emu/yuzu-mainline.git
synced 2024-12-25 19:25:37 +00:00
commit
6c37a90d3f
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@ -4488,10 +4488,6 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
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unsigned int operand2 = ROTATE_RIGHT_32(RM, 8 * inst_cream->rotate) & 0xffff;
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unsigned int operand2 = ROTATE_RIGHT_32(RM, 8 * inst_cream->rotate) & 0xffff;
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RD = RN + operand2;
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RD = RN + operand2;
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if (inst_cream->Rn == 15 || inst_cream->Rm == 15) {
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LOG_ERROR(Core_ARM11, "invalid operands for UXTAH");
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CITRA_IGNORE_EXIT(-1);
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}
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}
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}
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cpu->Reg[15] += GET_INST_SIZE(cpu);
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cpu->Reg[15] += GET_INST_SIZE(cpu);
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INC_PC(sizeof(uxtah_inst));
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INC_PC(sizeof(uxtah_inst));
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@ -4822,10 +4818,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
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uint64_t rm = RM;
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uint64_t rm = RM;
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uint64_t rs = RS;
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uint64_t rs = RS;
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uint64_t rn = RN;
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uint64_t rn = RN;
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if (inst_cream->Rm == 15 || inst_cream->Rs == 15 || inst_cream->Rn == 15) {
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LOG_ERROR(Core_ARM11, "invalid operands for MLA");
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CITRA_IGNORE_EXIT(-1);
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}
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RD = static_cast<uint32_t>((rm * rs + rn) & 0xffffffff);
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RD = static_cast<uint32_t>((rm * rs + rn) & 0xffffffff);
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if (inst_cream->S) {
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if (inst_cream->S) {
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UPDATE_NFLAG(RD);
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UPDATE_NFLAG(RD);
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@ -5104,10 +5097,10 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
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PLD_INST:
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PLD_INST:
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{
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{
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// Instruction not implemented
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// Not implemented. PLD is a hint instruction, so it's optional.
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//LOG_CRITICAL(Core_ARM11, "unimplemented instruction");
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cpu->Reg[15] += GET_INST_SIZE(cpu);
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cpu->Reg[15] += GET_INST_SIZE(cpu);
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INC_PC(sizeof(stc_inst));
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INC_PC(sizeof(pld_inst));
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FETCH_INST;
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FETCH_INST;
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GOTO_NEXT_INST;
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GOTO_NEXT_INST;
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}
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}
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@ -6033,15 +6026,12 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
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if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
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if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
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sxtb_inst* inst_cream = (sxtb_inst*)inst_base->component;
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sxtb_inst* inst_cream = (sxtb_inst*)inst_base->component;
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if (inst_cream->Rm == 15) {
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LOG_ERROR(Core_ARM11, "invalid operand for SXTB");
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CITRA_IGNORE_EXIT(-1);
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}
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unsigned int operand2 = ROTATE_RIGHT_32(RM, 8 * inst_cream->rotate);
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unsigned int operand2 = ROTATE_RIGHT_32(RM, 8 * inst_cream->rotate);
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if (BIT(operand2, 7)) {
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if (BIT(operand2, 7)) {
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operand2 |= 0xffffff00;
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operand2 |= 0xffffff00;
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} else
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} else {
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operand2 &= 0xff;
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operand2 &= 0xff;
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}
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RD = operand2;
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RD = operand2;
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}
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}
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cpu->Reg[15] += GET_INST_SIZE(cpu);
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cpu->Reg[15] += GET_INST_SIZE(cpu);
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@ -6299,8 +6289,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
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swp_inst* inst_cream = (swp_inst*)inst_base->component;
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swp_inst* inst_cream = (swp_inst*)inst_base->component;
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addr = RN;
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addr = RN;
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unsigned int value;
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unsigned int value = Memory::Read32(addr);
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value = Memory::Read32(addr);
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Memory::Write32(addr, RM);
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Memory::Write32(addr, RM);
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RD = value;
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RD = value;
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@ -6329,10 +6318,6 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
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if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
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if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
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sxtab_inst* inst_cream = (sxtab_inst*)inst_base->component;
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sxtab_inst* inst_cream = (sxtab_inst*)inst_base->component;
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// R15 should be check
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if(inst_cream->Rn == 15 || inst_cream->Rm == 15 || inst_cream->Rd ==15){
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CITRA_IGNORE_EXIT(-1);
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}
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unsigned int operand2 = ROTATE_RIGHT_32(RM, 8 * inst_cream->rotate) & 0xff;
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unsigned int operand2 = ROTATE_RIGHT_32(RM, 8 * inst_cream->rotate) & 0xff;
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// Sign extend for byte
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// Sign extend for byte
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@ -6383,10 +6368,6 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
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if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
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if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
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sxtah_inst* inst_cream = (sxtah_inst*)inst_base->component;
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sxtah_inst* inst_cream = (sxtah_inst*)inst_base->component;
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// R15 should be check
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if(inst_cream->Rn == 15 || inst_cream->Rm == 15 || inst_cream->Rd ==15) {
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CITRA_IGNORE_EXIT(-1);
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}
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unsigned int operand2 = ROTATE_RIGHT_32(RM, 8 * inst_cream->rotate) & 0xffff;
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unsigned int operand2 = ROTATE_RIGHT_32(RM, 8 * inst_cream->rotate) & 0xffff;
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// Sign extend for half
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// Sign extend for half
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operand2 = (0x8000 & operand2) ? (0xFFFF0000 | operand2) : operand2;
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operand2 = (0x8000 & operand2) ? (0xFFFF0000 | operand2) : operand2;
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