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shader_ir: Remove composite primitives and use temporals instead

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This commit is contained in:
ReinUsesLisp 2018-12-27 01:50:22 -03:00
parent bb12f99b20
commit d911740e5d
4 changed files with 239 additions and 256 deletions
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103
src/video_core/renderer_opengl/gl_shader_decompiler.cpp
View file

@ -2,6 +2,7 @@
// Licensed under GPLv2 or any later version // Licensed under GPLv2 or any later version
// Refer to the license.txt file included. // Refer to the license.txt file included.
#include <array>
#include <string> #include <string>
#include <string_view> #include <string_view>
#include <variant> #include <variant>
@ -770,49 +771,6 @@ private:
return {}; return {};
} }
std::string AssignComposite(Operation operation) {
const auto& meta = std::get<MetaComponents>(operation.GetMeta());
const std::string composite = code.GenerateTemporal();
code.AddLine("vec4 " + composite + " = " + Visit(operation[0]) + ';');
constexpr u32 composite_size = 4;
for (u32 i = 0; i < composite_size; ++i) {
const auto gpr = std::get<GprNode>(*operation[i + 1]).GetIndex();
if (gpr == Register::ZeroIndex) {
continue;
}
code.AddLine(GetRegister(gpr) + " = " + composite +
GetSwizzle(meta.GetSourceComponent(i)) + ';');
}
return {};
}
std::string AssignCompositeHalf(Operation operation) {
const auto& meta = std::get<MetaComponents>(operation.GetMeta());
const std::string composite = code.GenerateTemporal();
code.AddLine("vec4 " + composite + " = " + Visit(operation[0]) + ';');
const auto ReadComponent = [&](u32 component) {
if (component < meta.count) {
return composite + '[' + std::to_string(meta.GetSourceComponent(component)) + ']';
}
return std::string("0");
};
const auto dst1 = std::get<GprNode>(*operation[1]).GetIndex();
const std::string src1 = "vec2(" + ReadComponent(0) + ", " + ReadComponent(1) + ')';
code.AddLine(GetRegister(dst1) + " = utof(packHalf2x16(" + src1 + "))");
if (meta.count > 2) {
const auto dst2 = std::get<GprNode>(*operation[2]).GetIndex();
const std::string src2 = "vec2(" + ReadComponent(2) + ", " + ReadComponent(3) + ')';
code.AddLine(GetRegister(dst2) + " = utof(packHalf2x16(" + src2 + "));");
}
return {};
}
std::string Composite(Operation operation) { std::string Composite(Operation operation) {
std::string value = "vec4("; std::string value = "vec4(";
for (std::size_t i = 0; i < 4; ++i) { for (std::size_t i = 0; i < 4; ++i) {
@ -1018,6 +976,10 @@ private:
Visit(operation[1]) + ")[1]))"; Visit(operation[1]) + ")[1]))";
} }
std::string HPack2(Operation operation) {
return "utof(packHalf2x16(vec2(" + Visit(operation[0]) + ", " + Visit(operation[1]) + ")))";
}
template <Type type> template <Type type>
std::string LogicalLessThan(Operation operation) { std::string LogicalLessThan(Operation operation) {
return GenerateBinaryInfix(operation, "<", Type::Bool, type, type); return GenerateBinaryInfix(operation, "<", Type::Bool, type, type);
@ -1137,30 +1099,35 @@ private:
} }
std::string F4Texture(Operation operation) { std::string F4Texture(Operation operation) {
const auto meta = std::get<MetaTexture>(operation.GetMeta());
std::string expr = GenerateTexture(operation, "texture"); std::string expr = GenerateTexture(operation, "texture");
if (std::get<MetaTexture>(operation.GetMeta()).sampler.IsShadow()) { if (meta.sampler.IsShadow()) {
expr = "vec4(" + expr + ')'; expr = "vec4(" + expr + ')';
} }
return expr; return expr + GetSwizzle(meta.element);
} }
std::string F4TextureLod(Operation operation) { std::string F4TextureLod(Operation operation) {
const auto meta = std::get<MetaTexture>(operation.GetMeta());
std::string expr = GenerateTexture(operation, "textureLod"); std::string expr = GenerateTexture(operation, "textureLod");
if (std::get<MetaTexture>(operation.GetMeta()).sampler.IsShadow()) { if (meta.sampler.IsShadow()) {
expr = "vec4(" + expr + ')'; expr = "vec4(" + expr + ')';
} }
return expr; return expr + GetSwizzle(meta.element);
} }
std::string F4TextureGather(Operation operation) { std::string F4TextureGather(Operation operation) {
const bool is_shadow = std::get<MetaTexture>(operation.GetMeta()).sampler.IsShadow(); const auto meta = std::get<MetaTexture>(operation.GetMeta());
if (is_shadow) {
return GenerateTexture(operation, "textureGather", std::string expr;
if (meta.sampler.IsShadow()) {
expr = GenerateTexture(operation, "textureGather",
[](std::string ref_z) { return ref_z; }); [](std::string ref_z) { return ref_z; });
} else { } else {
return GenerateTexture(operation, "textureGather", expr = GenerateTexture(operation, "textureGather",
[](std::string comp) { return "ftoi(" + comp + ')'; }); [](std::string comp) { return "ftoi(" + comp + ')'; });
} }
return expr + GetSwizzle(meta.element);
} }
std::string F4TextureQueryDimensions(Operation operation) { std::string F4TextureQueryDimensions(Operation operation) {
@ -1168,20 +1135,26 @@ private:
const std::string sampler = GetSampler(meta.sampler); const std::string sampler = GetSampler(meta.sampler);
const std::string lod = VisitOperand(operation, 0, Type::Int); const std::string lod = VisitOperand(operation, 0, Type::Int);
const std::string sizes = code.GenerateTemporal(); switch (meta.element) {
code.AddLine("ivec2 " + sizes + " = textureSize(" + sampler + ", " + lod + ");"); case 0:
case 1:
const std::string mip_level = "textureQueryLevels(" + sampler + ')'; return "textureSize(" + sampler + ", " + lod + ')' + GetSwizzle(meta.element);
case 2:
return "itof(ivec4(" + sizes + ", 0, " + mip_level + "))"; return "0";
case 3:
return "textureQueryLevels(" + sampler + ')';
}
UNREACHABLE();
return "0";
} }
std::string F4TextureQueryLod(Operation operation) { std::string F4TextureQueryLod(Operation operation) {
const std::string tmp = code.GenerateTemporal(); const auto& meta = std::get<MetaTexture>(operation.GetMeta());
code.AddLine("vec2 " + tmp + " = " + GenerateTexture(operation, "textureQueryLod") + if (meta.element < 2) {
" * vec2(256);"); return "itof(int((" + GenerateTexture(operation, "textureQueryLod") + " * vec2(256))" +
GetSwizzle(meta.element) + "))";
return "vec4(itof(int(" + tmp + ".y)), utof(uint(" + tmp + ".x)), 0, 0)"; }
return "0";
} }
std::string F4TexelFetch(Operation operation) { std::string F4TexelFetch(Operation operation) {
@ -1206,7 +1179,7 @@ private:
} }
} }
expr += ')'; expr += ')';
return expr; return expr + GetSwizzle(meta.element);
} }
std::string Branch(Operation operation) { std::string Branch(Operation operation) {
@ -1328,10 +1301,7 @@ private:
static constexpr OperationDecompilersArray operation_decompilers = { static constexpr OperationDecompilersArray operation_decompilers = {
&GLSLDecompiler::Assign, &GLSLDecompiler::Assign,
&GLSLDecompiler::AssignComposite,
&GLSLDecompiler::AssignCompositeHalf,
&GLSLDecompiler::Composite,
&GLSLDecompiler::Select, &GLSLDecompiler::Select,
&GLSLDecompiler::Add<Type::Float>, &GLSLDecompiler::Add<Type::Float>,
@ -1403,6 +1373,7 @@ private:
&GLSLDecompiler::HMergeF32, &GLSLDecompiler::HMergeF32,
&GLSLDecompiler::HMergeH0, &GLSLDecompiler::HMergeH0,
&GLSLDecompiler::HMergeH1, &GLSLDecompiler::HMergeH1,
&GLSLDecompiler::HPack2,
&GLSLDecompiler::LogicalAssign, &GLSLDecompiler::LogicalAssign,
&GLSLDecompiler::LogicalAnd, &GLSLDecompiler::LogicalAnd,

324
src/video_core/shader/decode/memory.cpp
View file

@ -90,15 +90,10 @@ u32 ShaderIR::DecodeMemory(BasicBlock& bb, u32 pc) {
const Node op_b = const Node op_b =
GetConstBufferIndirect(instr.cbuf36.index, instr.cbuf36.offset + 4, index); GetConstBufferIndirect(instr.cbuf36.index, instr.cbuf36.offset + 4, index);
const Node composite = SetTemporal(bb, 0, op_a);
Operation(OperationCode::Composite, op_a, op_b, GetRegister(Register::ZeroIndex), SetTemporal(bb, 1, op_b);
GetRegister(Register::ZeroIndex)); SetRegister(bb, instr.gpr0, GetTemporal(0));
SetRegister(bb, instr.gpr0.Value() + 1, GetTemporal(1));
MetaComponents meta{{0, 1, 2, 3}};
bb.push_back(Operation(OperationCode::AssignComposite, meta, composite,
GetRegister(instr.gpr0), GetRegister(instr.gpr0.Value() + 1),
GetRegister(Register::ZeroIndex),
GetRegister(Register::ZeroIndex)));
break; break;
} }
default: default:
@ -172,10 +167,6 @@ u32 ShaderIR::DecodeMemory(BasicBlock& bb, u32 pc) {
break; break;
} }
case OpCode::Id::TEX: { case OpCode::Id::TEX: {
Tegra::Shader::TextureType texture_type{instr.tex.texture_type};
const bool is_array = instr.tex.array != 0;
const bool depth_compare = instr.tex.UsesMiscMode(TextureMiscMode::DC);
const auto process_mode = instr.tex.GetTextureProcessMode();
UNIMPLEMENTED_IF_MSG(instr.tex.UsesMiscMode(TextureMiscMode::AOFFI), UNIMPLEMENTED_IF_MSG(instr.tex.UsesMiscMode(TextureMiscMode::AOFFI),
"AOFFI is not implemented"); "AOFFI is not implemented");
@ -183,27 +174,12 @@ u32 ShaderIR::DecodeMemory(BasicBlock& bb, u32 pc) {
LOG_WARNING(HW_GPU, "TEX.NODEP implementation is incomplete"); LOG_WARNING(HW_GPU, "TEX.NODEP implementation is incomplete");
} }
const Node texture = GetTexCode(instr, texture_type, process_mode, depth_compare, is_array); const TextureType texture_type{instr.tex.texture_type};
const bool is_array = instr.tex.array != 0;
MetaComponents meta; const bool depth_compare = instr.tex.UsesMiscMode(TextureMiscMode::DC);
std::array<Node, 4> dest; const auto process_mode = instr.tex.GetTextureProcessMode();
WriteTexInstructionFloat(
std::size_t dest_elem = 0; bb, instr, GetTexCode(instr, texture_type, process_mode, depth_compare, is_array));
for (std::size_t elem = 0; elem < 4; ++elem) {
if (!instr.tex.IsComponentEnabled(elem)) {
// Skip disabled components
continue;
}
meta.components_map[dest_elem] = static_cast<u32>(elem);
dest[dest_elem] = GetRegister(instr.gpr0.Value() + dest_elem);
++dest_elem;
}
std::generate(dest.begin() + dest_elem, dest.end(),
[&]() { return GetRegister(Register::ZeroIndex); });
bb.push_back(Operation(OperationCode::AssignComposite, std::move(meta), texture, dest[0],
dest[1], dest[2], dest[3]));
break; break;
} }
case OpCode::Id::TEXS: { case OpCode::Id::TEXS: {
@ -216,13 +192,13 @@ u32 ShaderIR::DecodeMemory(BasicBlock& bb, u32 pc) {
LOG_WARNING(HW_GPU, "TEXS.NODEP implementation is incomplete"); LOG_WARNING(HW_GPU, "TEXS.NODEP implementation is incomplete");
} }
const Node texture = const Node4 components =
GetTexsCode(instr, texture_type, process_mode, depth_compare, is_array); GetTexsCode(instr, texture_type, process_mode, depth_compare, is_array);
if (instr.texs.fp32_flag) { if (instr.texs.fp32_flag) {
WriteTexsInstructionFloat(bb, instr, texture); WriteTexsInstructionFloat(bb, instr, components);
} else { } else {
WriteTexsInstructionHalfFloat(bb, instr, texture); WriteTexsInstructionHalfFloat(bb, instr, components);
} }
break; break;
} }
@ -242,27 +218,8 @@ u32 ShaderIR::DecodeMemory(BasicBlock& bb, u32 pc) {
const auto texture_type = instr.tld4.texture_type.Value(); const auto texture_type = instr.tld4.texture_type.Value();
const bool depth_compare = instr.tld4.UsesMiscMode(TextureMiscMode::DC); const bool depth_compare = instr.tld4.UsesMiscMode(TextureMiscMode::DC);
const bool is_array = instr.tld4.array != 0; const bool is_array = instr.tld4.array != 0;
const Node texture = GetTld4Code(instr, texture_type, depth_compare, is_array); WriteTexInstructionFloat(bb, instr,
GetTld4Code(instr, texture_type, depth_compare, is_array));
MetaComponents meta_components;
std::array<Node, 4> dest;
std::size_t dest_elem = 0;
for (std::size_t elem = 0; elem < 4; ++elem) {
if (!instr.tex.IsComponentEnabled(elem)) {
// Skip disabled components
continue;
}
meta_components.components_map[dest_elem] = static_cast<u32>(elem);
dest[dest_elem] = GetRegister(instr.gpr0.Value() + dest_elem);
++dest_elem;
}
std::generate(dest.begin() + dest_elem, dest.end(),
[&]() { return GetRegister(Register::ZeroIndex); });
bb.push_back(Operation(OperationCode::AssignComposite, std::move(meta_components), texture,
dest[0], dest[1], dest[2], dest[3]));
break; break;
} }
case OpCode::Id::TLD4S: { case OpCode::Id::TLD4S: {
@ -277,28 +234,34 @@ u32 ShaderIR::DecodeMemory(BasicBlock& bb, u32 pc) {
const Node op_a = GetRegister(instr.gpr8); const Node op_a = GetRegister(instr.gpr8);
const Node op_b = GetRegister(instr.gpr20); const Node op_b = GetRegister(instr.gpr20);
std::vector<Node> params; std::vector<Node> coords;
// TODO(Subv): Figure out how the sampler type is encoded in the TLD4S instruction. // TODO(Subv): Figure out how the sampler type is encoded in the TLD4S instruction.
if (depth_compare) { if (depth_compare) {
// Note: TLD4S coordinate encoding works just like TEXS's // Note: TLD4S coordinate encoding works just like TEXS's
const Node op_y = GetRegister(instr.gpr8.Value() + 1); const Node op_y = GetRegister(instr.gpr8.Value() + 1);
params.push_back(op_a); coords.push_back(op_a);
params.push_back(op_y); coords.push_back(op_y);
params.push_back(op_b); coords.push_back(op_b);
} else { } else {
params.push_back(op_a); coords.push_back(op_a);
params.push_back(op_b); coords.push_back(op_b);
} }
const auto num_coords = static_cast<u32>(params.size()); const auto num_coords = static_cast<u32>(coords.size());
params.push_back(Immediate(static_cast<u32>(instr.tld4s.component))); coords.push_back(Immediate(static_cast<u32>(instr.tld4s.component)));
const auto& sampler = const auto& sampler =
GetSampler(instr.sampler, TextureType::Texture2D, false, depth_compare); GetSampler(instr.sampler, TextureType::Texture2D, false, depth_compare);
MetaTexture meta{sampler, num_coords};
WriteTexsInstructionFloat( Node4 values;
bb, instr, Operation(OperationCode::F4TextureGather, meta, std::move(params))); for (u32 element = 0; element < values.size(); ++element) {
auto params = coords;
MetaTexture meta{sampler, element, num_coords};
values[element] =
Operation(OperationCode::F4TextureGather, std::move(meta), std::move(params));
}
WriteTexsInstructionFloat(bb, instr, values);
break; break;
} }
case OpCode::Id::TXQ: { case OpCode::Id::TXQ: {
@ -314,18 +277,15 @@ u32 ShaderIR::DecodeMemory(BasicBlock& bb, u32 pc) {
switch (instr.txq.query_type) { switch (instr.txq.query_type) {
case Tegra::Shader::TextureQueryType::Dimension: { case Tegra::Shader::TextureQueryType::Dimension: {
MetaTexture meta_texture{sampler}; for (u32 element = 0; element < 4; ++element) {
const MetaComponents meta_components{{0, 1, 2, 3}}; MetaTexture meta{sampler, element};
const Node value = Operation(OperationCode::F4TextureQueryDimensions,
const Node texture = Operation(OperationCode::F4TextureQueryDimensions, meta_texture, std::move(meta), GetRegister(instr.gpr8));
GetRegister(instr.gpr8)); SetTemporal(bb, element, value);
std::array<Node, 4> dest; }
for (std::size_t i = 0; i < dest.size(); ++i) { for (u32 i = 0; i < 4; ++i) {
dest[i] = GetRegister(instr.gpr0.Value() + i); SetRegister(bb, instr.gpr0.Value() + i, GetTemporal(i));
} }
bb.push_back(Operation(OperationCode::AssignComposite, meta_components, texture,
dest[0], dest[1], dest[2], dest[3]));
break; break;
} }
default: default:
@ -366,14 +326,17 @@ u32 ShaderIR::DecodeMemory(BasicBlock& bb, u32 pc) {
texture_type = TextureType::Texture2D; texture_type = TextureType::Texture2D;
} }
MetaTexture meta_texture{sampler, static_cast<u32>(coords.size())}; for (u32 element = 0; element < 2; ++element) {
const Node texture = auto params = coords;
Operation(OperationCode::F4TextureQueryLod, meta_texture, std::move(coords)); MetaTexture meta_texture{sampler, element, static_cast<u32>(coords.size())};
const Node value =
Operation(OperationCode::F4TextureQueryLod, meta_texture, std::move(params));
SetTemporal(bb, element, value);
}
for (u32 element = 0; element < 2; ++element) {
SetRegister(bb, instr.gpr0.Value() + element, GetTemporal(element));
}
const MetaComponents meta_composite{{0, 1, 2, 3}};
bb.push_back(Operation(OperationCode::AssignComposite, meta_composite, texture,
GetRegister(instr.gpr0), GetRegister(instr.gpr0.Value() + 1),
GetRegister(Register::ZeroIndex), GetRegister(Register::ZeroIndex)));
break; break;
} }
case OpCode::Id::TLDS: { case OpCode::Id::TLDS: {
@ -388,8 +351,7 @@ u32 ShaderIR::DecodeMemory(BasicBlock& bb, u32 pc) {
LOG_WARNING(HW_GPU, "TMML.NODEP implementation is incomplete"); LOG_WARNING(HW_GPU, "TMML.NODEP implementation is incomplete");
} }
const Node texture = GetTldsCode(instr, texture_type, is_array); WriteTexsInstructionFloat(bb, instr, GetTldsCode(instr, texture_type, is_array));
WriteTexsInstructionFloat(bb, instr, texture);
break; break;
} }
default: default:
@ -419,57 +381,80 @@ const Sampler& ShaderIR::GetSampler(const Tegra::Shader::Sampler& sampler, Textu
return *used_samplers.emplace(entry).first; return *used_samplers.emplace(entry).first;
} }
void ShaderIR::WriteTexsInstructionFloat(BasicBlock& bb, Instruction instr, Node texture) { void ShaderIR::WriteTexInstructionFloat(BasicBlock& bb, Instruction instr,
const Node4& components) {
u32 dest_elem = 0;
for (u32 elem = 0; elem < 4; ++elem) {
if (!instr.tex.IsComponentEnabled(elem)) {
// Skip disabled components
continue;
}
SetTemporal(bb, dest_elem++, components[elem]);
}
// After writing values in temporals, move them to the real registers
for (u32 i = 0; i < dest_elem; ++i) {
SetRegister(bb, instr.gpr0.Value() + i, GetTemporal(i));
}
}
void ShaderIR::WriteTexsInstructionFloat(BasicBlock& bb, Instruction instr,
const Node4& components) {
// TEXS has two destination registers and a swizzle. The first two elements in the swizzle // TEXS has two destination registers and a swizzle. The first two elements in the swizzle
// go into gpr0+0 and gpr0+1, and the rest goes into gpr28+0 and gpr28+1 // go into gpr0+0 and gpr0+1, and the rest goes into gpr28+0 and gpr28+1
MetaComponents meta; u32 dest_elem = 0;
std::array<Node, 4> dest;
for (u32 component = 0; component < 4; ++component) {
if (!instr.texs.IsComponentEnabled(component)) {
continue;
}
meta.components_map[meta.count] = component;
if (meta.count < 2) {
// Write the first two swizzle components to gpr0 and gpr0+1
dest[meta.count] = GetRegister(instr.gpr0.Value() + meta.count % 2);
} else {
ASSERT(instr.texs.HasTwoDestinations());
// Write the rest of the swizzle components to gpr28 and gpr28+1
dest[meta.count] = GetRegister(instr.gpr28.Value() + meta.count % 2);
}
++meta.count;
}
std::generate(dest.begin() + meta.count, dest.end(),
[&]() { return GetRegister(Register::ZeroIndex); });
bb.push_back(Operation(OperationCode::AssignComposite, meta, texture, dest[0], dest[1], dest[2],
dest[3]));
}
void ShaderIR::WriteTexsInstructionHalfFloat(BasicBlock& bb, Instruction instr, Node texture) {
// TEXS.F16 destionation registers are packed in two registers in pairs (just like any half
// float instruction).
MetaComponents meta;
for (u32 component = 0; component < 4; ++component) { for (u32 component = 0; component < 4; ++component) {
if (!instr.texs.IsComponentEnabled(component)) if (!instr.texs.IsComponentEnabled(component))
continue; continue;
meta.components_map[meta.count++] = component; SetTemporal(bb, dest_elem++, components[component]);
} }
if (meta.count == 0)
return;
bb.push_back(Operation(OperationCode::AssignCompositeHalf, meta, texture, for (u32 i = 0; i < dest_elem; ++i) {
GetRegister(instr.gpr0), GetRegister(instr.gpr28))); if (i < 2) {
// Write the first two swizzle components to gpr0 and gpr0+1
SetRegister(bb, instr.gpr0.Value() + i % 2, GetTemporal(i));
} else {
ASSERT(instr.texs.HasTwoDestinations());
// Write the rest of the swizzle components to gpr28 and gpr28+1
SetRegister(bb, instr.gpr28.Value() + i % 2, GetTemporal(i));
}
}
} }
Node ShaderIR::GetTextureCode(Instruction instr, TextureType texture_type, void ShaderIR::WriteTexsInstructionHalfFloat(BasicBlock& bb, Instruction instr,
TextureProcessMode process_mode, bool depth_compare, bool is_array, const Node4& components) {
std::size_t array_offset, std::size_t bias_offset, // TEXS.F16 destionation registers are packed in two registers in pairs (just like any half
std::vector<Node>&& coords) { // float instruction).
Node4 values;
u32 dest_elem = 0;
for (u32 component = 0; component < 4; ++component) {
if (!instr.texs.IsComponentEnabled(component))
continue;
values[dest_elem++] = components[component];
}
if (dest_elem == 0)
return;
std::generate(values.begin() + dest_elem, values.end(), [&]() { return Immediate(0); });
const Node first_value = Operation(OperationCode::HPack2, values[0], values[1]);
if (dest_elem <= 2) {
SetRegister(bb, instr.gpr0, first_value);
return;
}
SetTemporal(bb, 0, first_value);
SetTemporal(bb, 1, Operation(OperationCode::HPack2, values[2], values[3]));
SetRegister(bb, instr.gpr0, GetTemporal(0));
SetRegister(bb, instr.gpr28, GetTemporal(1));
}
Node4 ShaderIR::GetTextureCode(Instruction instr, TextureType texture_type,
TextureProcessMode process_mode, bool depth_compare, bool is_array,
std::size_t array_offset, std::size_t bias_offset,
std::vector<Node>&& coords) {
UNIMPLEMENTED_IF_MSG( UNIMPLEMENTED_IF_MSG(
(texture_type == TextureType::Texture3D && (is_array || depth_compare)) || (texture_type == TextureType::Texture3D && (is_array || depth_compare)) ||
(texture_type == TextureType::TextureCube && is_array && depth_compare), (texture_type == TextureType::TextureCube && is_array && depth_compare),
@ -495,24 +480,31 @@ Node ShaderIR::GetTextureCode(Instruction instr, TextureType texture_type,
std::optional<u32> array_offset_value; std::optional<u32> array_offset_value;
if (is_array) if (is_array)
array_offset_value = static_cast<u32>(array_offset); array_offset_value = static_cast<u32>(array_offset);
MetaTexture meta{sampler, static_cast<u32>(coords.size()), array_offset_value};
std::vector<Node> params = std::move(coords); const auto coords_count = static_cast<u32>(coords.size());
if (process_mode != TextureProcessMode::None && gl_lod_supported) { if (process_mode != TextureProcessMode::None && gl_lod_supported) {
if (process_mode == TextureProcessMode::LZ) { if (process_mode == TextureProcessMode::LZ) {
params.push_back(Immediate(0.0f)); coords.push_back(Immediate(0.0f));
} else { } else {
// If present, lod or bias are always stored in the register indexed by the gpr20 field // If present, lod or bias are always stored in the register indexed by the gpr20
// with an offset depending on the usage of the other registers // field with an offset depending on the usage of the other registers
params.push_back(GetRegister(instr.gpr20.Value() + bias_offset)); coords.push_back(GetRegister(instr.gpr20.Value() + bias_offset));
} }
} }
return Operation(read_method, meta, std::move(params)); Node4 values;
for (u32 element = 0; element < values.size(); ++element) {
auto params = coords;
MetaTexture meta{sampler, element, coords_count, array_offset_value};
values[element] = Operation(read_method, std::move(meta), std::move(params));
}
return values;
} }
Node ShaderIR::GetTexCode(Instruction instr, TextureType texture_type, Node4 ShaderIR::GetTexCode(Instruction instr, TextureType texture_type,
TextureProcessMode process_mode, bool depth_compare, bool is_array) { TextureProcessMode process_mode, bool depth_compare, bool is_array) {
const bool lod_bias_enabled = const bool lod_bias_enabled =
(process_mode != TextureProcessMode::None && process_mode != TextureProcessMode::LZ); (process_mode != TextureProcessMode::None && process_mode != TextureProcessMode::LZ);
@ -551,8 +543,8 @@ Node ShaderIR::GetTexCode(Instruction instr, TextureType texture_type,
0, std::move(coords)); 0, std::move(coords));
} }
Node ShaderIR::GetTexsCode(Instruction instr, TextureType texture_type, Node4 ShaderIR::GetTexsCode(Instruction instr, TextureType texture_type,
TextureProcessMode process_mode, bool depth_compare, bool is_array) { TextureProcessMode process_mode, bool depth_compare, bool is_array) {
const bool lod_bias_enabled = const bool lod_bias_enabled =
(process_mode != TextureProcessMode::None && process_mode != TextureProcessMode::LZ); (process_mode != TextureProcessMode::None && process_mode != TextureProcessMode::LZ);
@ -593,8 +585,8 @@ Node ShaderIR::GetTexsCode(Instruction instr, TextureType texture_type,
(coord_count > 2 ? 1 : 0), std::move(coords)); (coord_count > 2 ? 1 : 0), std::move(coords));
} }
Node ShaderIR::GetTld4Code(Instruction instr, TextureType texture_type, bool depth_compare, Node4 ShaderIR::GetTld4Code(Instruction instr, TextureType texture_type, bool depth_compare,
bool is_array) { bool is_array) {
const std::size_t coord_count = GetCoordCount(texture_type); const std::size_t coord_count = GetCoordCount(texture_type);
const std::size_t total_coord_count = coord_count + (is_array ? 1 : 0); const std::size_t total_coord_count = coord_count + (is_array ? 1 : 0);
const std::size_t total_reg_count = total_coord_count + (depth_compare ? 1 : 0); const std::size_t total_reg_count = total_coord_count + (depth_compare ? 1 : 0);
@ -604,24 +596,31 @@ Node ShaderIR::GetTld4Code(Instruction instr, TextureType texture_type, bool dep
// First coordinate index is the gpr8 or gpr8 + 1 when arrays are used // First coordinate index is the gpr8 or gpr8 + 1 when arrays are used
const u64 coord_register = array_register + (is_array ? 1 : 0); const u64 coord_register = array_register + (is_array ? 1 : 0);
std::vector<Node> params; std::vector<Node> coords;
for (size_t i = 0; i < coord_count; ++i) { for (size_t i = 0; i < coord_count; ++i) {
params.push_back(GetRegister(coord_register + i)); coords.push_back(GetRegister(coord_register + i));
} }
std::optional<u32> array_offset; std::optional<u32> array_offset;
if (is_array) { if (is_array) {
array_offset = static_cast<u32>(params.size()); array_offset = static_cast<u32>(coords.size());
params.push_back(GetRegister(array_register)); coords.push_back(GetRegister(array_register));
} }
const auto& sampler = GetSampler(instr.sampler, texture_type, is_array, depth_compare); const auto& sampler = GetSampler(instr.sampler, texture_type, is_array, depth_compare);
MetaTexture meta{sampler, static_cast<u32>(params.size()), array_offset};
return Operation(OperationCode::F4TextureGather, std::move(meta), std::move(params)); Node4 values;
for (u32 element = 0; element < values.size(); ++element) {
auto params = coords;
MetaTexture meta{sampler, element, static_cast<u32>(coords.size()), array_offset};
values[element] =
Operation(OperationCode::F4TextureGather, std::move(meta), std::move(params));
}
return values;
} }
Node ShaderIR::GetTldsCode(Instruction instr, TextureType texture_type, bool is_array) { Node4 ShaderIR::GetTldsCode(Instruction instr, TextureType texture_type, bool is_array) {
const std::size_t type_coord_count = GetCoordCount(texture_type); const std::size_t type_coord_count = GetCoordCount(texture_type);
const std::size_t total_coord_count = type_coord_count + (is_array ? 1 : 0); const std::size_t total_coord_count = type_coord_count + (is_array ? 1 : 0);
const bool lod_enabled = instr.tlds.GetTextureProcessMode() == TextureProcessMode::LL; const bool lod_enabled = instr.tlds.GetTextureProcessMode() == TextureProcessMode::LL;
@ -636,36 +635,41 @@ Node ShaderIR::GetTldsCode(Instruction instr, TextureType texture_type, bool is_
? static_cast<u64>(instr.gpr20.Value()) ? static_cast<u64>(instr.gpr20.Value())
: coord_register + 1; : coord_register + 1;
std::vector<Node> params; std::vector<Node> coords;
for (std::size_t i = 0; i < type_coord_count; ++i) { for (std::size_t i = 0; i < type_coord_count; ++i) {
const bool last = (i == (type_coord_count - 1)) && (type_coord_count > 1); const bool last = (i == (type_coord_count - 1)) && (type_coord_count > 1);
params.push_back(GetRegister(last ? last_coord_register : coord_register + i)); coords.push_back(GetRegister(last ? last_coord_register : coord_register + i));
} }
std::optional<u32> array_offset; std::optional<u32> array_offset;
if (is_array) { if (is_array) {
array_offset = static_cast<u32>(params.size()); array_offset = static_cast<u32>(coords.size());
params.push_back(GetRegister(array_register)); coords.push_back(GetRegister(array_register));
} }
const auto coords_count = static_cast<u32>(params.size()); const auto coords_count = static_cast<u32>(coords.size());
if (lod_enabled) { if (lod_enabled) {
// When lod is used always is in grp20 // When lod is used always is in grp20
params.push_back(GetRegister(instr.gpr20)); coords.push_back(GetRegister(instr.gpr20));
} else { } else {
params.push_back(Immediate(0)); coords.push_back(Immediate(0));
} }
const auto& sampler = GetSampler(instr.sampler, texture_type, is_array, false); const auto& sampler = GetSampler(instr.sampler, texture_type, is_array, false);
MetaTexture meta{sampler, coords_count, array_offset};
return Operation(OperationCode::F4TexelFetch, std::move(meta), std::move(params)); Node4 values;
for (u32 element = 0; element < values.size(); ++element) {
auto params = coords;
MetaTexture meta{sampler, element, coords_count, array_offset};
values[element] =
Operation(OperationCode::F4TexelFetch, std::move(meta), std::move(params));
}
return values;
} }
std::tuple<std::size_t, std::size_t> ShaderIR::ValidateAndGetCoordinateElement( std::tuple<std::size_t, std::size_t> ShaderIR::ValidateAndGetCoordinateElement(
TextureType texture_type, bool depth_compare, bool is_array, bool lod_bias_enabled, TextureType texture_type, bool depth_compare, bool is_array, bool lod_bias_enabled,
std::size_t max_coords, std::size_t max_inputs) { std::size_t max_coords, std::size_t max_inputs) {
const std::size_t coord_count = GetCoordCount(texture_type); const std::size_t coord_count = GetCoordCount(texture_type);
std::size_t total_coord_count = coord_count + (is_array ? 1 : 0) + (depth_compare ? 1 : 0); std::size_t total_coord_count = coord_count + (is_array ? 1 : 0) + (depth_compare ? 1 : 0);

8
src/video_core/shader/shader_ir.cpp
View file

@ -121,6 +121,10 @@ Node ShaderIR::GetLocalMemory(Node address) {
return StoreNode(LmemNode(address)); return StoreNode(LmemNode(address));
} }
Node ShaderIR::GetTemporal(u32 id) {
return GetRegister(Register::ZeroIndex + 1 + id);
}
Node ShaderIR::GetOperandAbsNegFloat(Node value, bool absolute, bool negate) { Node ShaderIR::GetOperandAbsNegFloat(Node value, bool absolute, bool negate) {
if (absolute) { if (absolute) {
value = Operation(OperationCode::FAbsolute, NO_PRECISE, value); value = Operation(OperationCode::FAbsolute, NO_PRECISE, value);
@ -348,6 +352,10 @@ void ShaderIR::SetLocalMemory(BasicBlock& bb, Node address, Node value) {
bb.push_back(Operation(OperationCode::Assign, GetLocalMemory(address), value)); bb.push_back(Operation(OperationCode::Assign, GetLocalMemory(address), value));
} }
void ShaderIR::SetTemporal(BasicBlock& bb, u32 id, Node value) {
SetRegister(bb, Register::ZeroIndex + 1 + id, value);
}
Node ShaderIR::BitfieldExtract(Node value, u32 offset, u32 bits) { Node ShaderIR::BitfieldExtract(Node value, u32 offset, u32 bits) {
return Operation(OperationCode::UBitfieldExtract, NO_PRECISE, value, Immediate(offset), return Operation(OperationCode::UBitfieldExtract, NO_PRECISE, value, Immediate(offset),
Immediate(bits)); Immediate(bits));

60
src/video_core/shader/shader_ir.h
View file

@ -4,6 +4,7 @@
#pragma once #pragma once
#include <array>
#include <cstring> #include <cstring>
#include <map> #include <map>
#include <set> #include <set>
@ -37,17 +38,15 @@ using NodeData =
std::variant<OperationNode, ConditionalNode, GprNode, ImmediateNode, InternalFlagNode, std::variant<OperationNode, ConditionalNode, GprNode, ImmediateNode, InternalFlagNode,
PredicateNode, AbufNode, CbufNode, LmemNode, GmemNode, CommentNode>; PredicateNode, AbufNode, CbufNode, LmemNode, GmemNode, CommentNode>;
using Node = const NodeData*; using Node = const NodeData*;
using Node4 = std::array<Node, 4>;
using BasicBlock = std::vector<Node>; using BasicBlock = std::vector<Node>;
constexpr u32 MAX_PROGRAM_LENGTH = 0x1000; constexpr u32 MAX_PROGRAM_LENGTH = 0x1000;
enum class OperationCode { enum class OperationCode {
Assign, /// (float& dest, float src) -> void Assign, /// (float& dest, float src) -> void
AssignComposite, /// (MetaComponents, float4 src, float&[4] dst) -> void
AssignCompositeHalf, /// (MetaComponents, float4 src, float&[2] dst) -> void
Composite, /// (float[4] values) -> float4 Select, /// (MetaArithmetic, bool pred, float a, float b) -> float
Select, /// (MetaArithmetic, bool pred, float a, float b) -> float
FAdd, /// (MetaArithmetic, float a, float b) -> float FAdd, /// (MetaArithmetic, float a, float b) -> float
FMul, /// (MetaArithmetic, float a, float b) -> float FMul, /// (MetaArithmetic, float a, float b) -> float
@ -117,6 +116,7 @@ enum class OperationCode {
HMergeF32, /// (f16vec2 src) -> float HMergeF32, /// (f16vec2 src) -> float
HMergeH0, /// (f16vec2 dest, f16vec2 src) -> f16vec2 HMergeH0, /// (f16vec2 dest, f16vec2 src) -> f16vec2
HMergeH1, /// (f16vec2 dest, f16vec2 src) -> f16vec2 HMergeH1, /// (f16vec2 dest, f16vec2 src) -> f16vec2
HPack2, /// (float a, float b) -> f16vec2
LogicalAssign, /// (bool& dst, bool src) -> void LogicalAssign, /// (bool& dst, bool src) -> void
LogicalAnd, /// (bool a, bool b) -> bool LogicalAnd, /// (bool a, bool b) -> bool
@ -270,24 +270,16 @@ struct MetaHalfArithmetic {
struct MetaTexture { struct MetaTexture {
const Sampler& sampler; const Sampler& sampler;
u32 element{};
u32 coords_count{}; u32 coords_count{};
std::optional<u32> array_index; std::optional<u32> array_index;
}; };
struct MetaComponents {
std::array<u32, 4> components_map{};
u32 count{};
u32 GetSourceComponent(u32 dest_index) const {
return components_map[dest_index];
}
};
constexpr MetaArithmetic PRECISE = {true}; constexpr MetaArithmetic PRECISE = {true};
constexpr MetaArithmetic NO_PRECISE = {false}; constexpr MetaArithmetic NO_PRECISE = {false};
constexpr MetaHalfArithmetic HALF_NO_PRECISE = {false}; constexpr MetaHalfArithmetic HALF_NO_PRECISE = {false};
using Meta = std::variant<MetaArithmetic, MetaHalfArithmetic, MetaTexture, MetaComponents>; using Meta = std::variant<MetaArithmetic, MetaHalfArithmetic, MetaTexture>;
/// Holds any kind of operation that can be done in the IR /// Holds any kind of operation that can be done in the IR
class OperationNode final { class OperationNode final {
@ -643,6 +635,8 @@ private:
Node GetInternalFlag(InternalFlag flag, bool negated = false); Node GetInternalFlag(InternalFlag flag, bool negated = false);
/// Generates a node representing a local memory address /// Generates a node representing a local memory address
Node GetLocalMemory(Node address); Node GetLocalMemory(Node address);
/// Generates a temporal, internally it uses a post-RZ register
Node GetTemporal(u32 id);
/// Sets a register. src value must be a number-evaluated node. /// Sets a register. src value must be a number-evaluated node.
void SetRegister(BasicBlock& bb, Tegra::Shader::Register dest, Node src); void SetRegister(BasicBlock& bb, Tegra::Shader::Register dest, Node src);
@ -652,6 +646,8 @@ private:
void SetInternalFlag(BasicBlock& bb, InternalFlag flag, Node value); void SetInternalFlag(BasicBlock& bb, InternalFlag flag, Node value);
/// Sets a local memory address. address and value must be a number-evaluated node /// Sets a local memory address. address and value must be a number-evaluated node
void SetLocalMemory(BasicBlock& bb, Node address, Node value); void SetLocalMemory(BasicBlock& bb, Node address, Node value);
/// Sets a temporal. Internally it uses a post-RZ register
void SetTemporal(BasicBlock& bb, u32 id, Node value);
/// Conditionally absolute/negated float. Absolute is applied first /// Conditionally absolute/negated float. Absolute is applied first
Node GetOperandAbsNegFloat(Node value, bool absolute, bool negate); Node GetOperandAbsNegFloat(Node value, bool absolute, bool negate);
@ -692,32 +688,36 @@ private:
/// Extracts a sequence of bits from a node /// Extracts a sequence of bits from a node
Node BitfieldExtract(Node value, u32 offset, u32 bits); Node BitfieldExtract(Node value, u32 offset, u32 bits);
void WriteTexsInstructionFloat(BasicBlock& bb, Tegra::Shader::Instruction instr, Node texture); void WriteTexInstructionFloat(BasicBlock& bb, Tegra::Shader::Instruction instr,
const Node4& components);
void WriteTexsInstructionFloat(BasicBlock& bb, Tegra::Shader::Instruction instr,
const Node4& components);
void WriteTexsInstructionHalfFloat(BasicBlock& bb, Tegra::Shader::Instruction instr, void WriteTexsInstructionHalfFloat(BasicBlock& bb, Tegra::Shader::Instruction instr,
Node texture); const Node4& components);
Node GetTexCode(Tegra::Shader::Instruction instr, Tegra::Shader::TextureType texture_type, Node4 GetTexCode(Tegra::Shader::Instruction instr, Tegra::Shader::TextureType texture_type,
Tegra::Shader::TextureProcessMode process_mode, bool depth_compare,
bool is_array);
Node GetTexsCode(Tegra::Shader::Instruction instr, Tegra::Shader::TextureType texture_type,
Tegra::Shader::TextureProcessMode process_mode, bool depth_compare, Tegra::Shader::TextureProcessMode process_mode, bool depth_compare,
bool is_array); bool is_array);
Node GetTld4Code(Tegra::Shader::Instruction instr, Tegra::Shader::TextureType texture_type, Node4 GetTexsCode(Tegra::Shader::Instruction instr, Tegra::Shader::TextureType texture_type,
bool depth_compare, bool is_array); Tegra::Shader::TextureProcessMode process_mode, bool depth_compare,
bool is_array);
Node GetTldsCode(Tegra::Shader::Instruction instr, Tegra::Shader::TextureType texture_type, Node4 GetTld4Code(Tegra::Shader::Instruction instr, Tegra::Shader::TextureType texture_type,
bool is_array); bool depth_compare, bool is_array);
Node4 GetTldsCode(Tegra::Shader::Instruction instr, Tegra::Shader::TextureType texture_type,
bool is_array);
std::tuple<std::size_t, std::size_t> ValidateAndGetCoordinateElement( std::tuple<std::size_t, std::size_t> ValidateAndGetCoordinateElement(
Tegra::Shader::TextureType texture_type, bool depth_compare, bool is_array, Tegra::Shader::TextureType texture_type, bool depth_compare, bool is_array,
bool lod_bias_enabled, std::size_t max_coords, std::size_t max_inputs); bool lod_bias_enabled, std::size_t max_coords, std::size_t max_inputs);
Node GetTextureCode(Tegra::Shader::Instruction instr, Tegra::Shader::TextureType texture_type, Node4 GetTextureCode(Tegra::Shader::Instruction instr, Tegra::Shader::TextureType texture_type,
Tegra::Shader::TextureProcessMode process_mode, bool depth_compare, Tegra::Shader::TextureProcessMode process_mode, bool depth_compare,
bool is_array, std::size_t array_offset, std::size_t bias_offset, bool is_array, std::size_t array_offset, std::size_t bias_offset,
std::vector<Node>&& coords); std::vector<Node>&& coords);
Node GetVideoOperand(Node op, bool is_chunk, bool is_signed, Tegra::Shader::VideoType type, Node GetVideoOperand(Node op, bool is_chunk, bool is_signed, Tegra::Shader::VideoType type,
u64 byte_height); u64 byte_height);