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https://github.com/yuzu-emu/yuzu-mainline.git
synced 2024-12-28 15:05:40 +00:00
Use u128 on Clock Cycles calculation.
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parent
3ea48e8ebe
commit
ecccfe0337
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@ -1,7 +1,25 @@
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#ifdef _MSC_VER
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#include <intrin.h>
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#pragma intrinsic(_umul128)
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#endif
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#include "common/uint128.h"
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namespace Common {
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u128 Multiply64Into128(u64 a, u64 b) {
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#ifdef _MSC_VER
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u128 result;
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result[0] = _umul128(a, b, &result[1]);
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#else
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unsigned __int128 tmp = a;
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tmp *= b;
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u128 result;
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std::memcpy(&result, &tmp, sizeof(u128));
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#endif
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return result;
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}
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std::pair<u64, u64> udiv128(u128 dividend, u64 divisor) {
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std::pair<u64, u64> Divide128On64(u128 dividend, u64 divisor) {
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u64 remainder = dividend[0] % divisor;
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u64 accum = dividend[0] / divisor;
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if (dividend[1] == 0)
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@ -12,6 +30,10 @@ std::pair<u64, u64> udiv128(u128 dividend, u64 divisor) {
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u64 second_segment = (first_segment % divisor) << 32;
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accum += (second_segment / divisor);
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remainder += second_segment % divisor;
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if (remainder >= divisor) {
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accum++;
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remainder -= divisor;
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}
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return {accum, remainder};
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}
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@ -1,30 +1,13 @@
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#include <array>
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#include <cstdint>
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#include <utility>
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#include <cstring>
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#include <utility>
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#include "common/common_types.h"
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namespace Common {
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#ifdef _MSC_VER
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#include <intrin.h>
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u128 Multiply64Into128(u64 a, u64 b);
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#pragma intrinsic(_umul128)
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#endif
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inline u128 umul128(u64 a, u64 b) {
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#ifdef _MSC_VER
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u128 result;
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result[0] = _umul128(a, b, &result[1]);
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#else
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unsigned __int128 tmp = a;
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tmp *= b;
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u128 result;
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std::memcpy(&result, &tmp, sizeof(u128));
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#endif
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return result;
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}
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std::pair<u64, u64> udiv128(u128 dividend, u64 divisor);
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std::pair<u64, u64> Divide128On64(u128 dividend, u64 divisor);
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} // namespace Common
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@ -120,7 +120,7 @@ public:
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return std::max(parent.core_timing.GetDowncount(), 0);
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}
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u64 GetCNTPCT() override {
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return CpuCyclesToClockCycles(parent.core_timing.GetTicks());
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return Timing::CpuCyclesToClockCycles(parent.core_timing.GetTicks());
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}
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ARM_Dynarmic& parent;
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@ -7,6 +7,7 @@
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#include <cinttypes>
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#include <limits>
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#include "common/logging/log.h"
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#include "common/uint128.h"
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namespace Core::Timing {
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@ -61,10 +62,9 @@ s64 nsToCycles(u64 ns) {
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}
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u64 CpuCyclesToClockCycles(u64 ticks) {
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u64 result = ticks;
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result *= CNTFREQ;
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result /= BASE_CLOCK_RATE;
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return static_cast<u64>(result);
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u128 temporal = Common::Multiply64Into128(ticks, CNTFREQ);
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std::pair<u64, u64> result = Common::Divide128On64(temporal, BASE_CLOCK_RATE);
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return result.first;
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}
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} // namespace Core::Timing
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@ -11,7 +11,7 @@ namespace Core::Timing {
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// The below clock rate is based on Switch's clockspeed being widely known as 1.020GHz
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// The exact value used is of course unverified.
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constexpr u64 BASE_CLOCK_RATE = 1019215872; // Switch clock speed is 1020MHz un/docked
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constexpr u64 CNTFREQ = 19200000; // Value from fusee.
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constexpr u64 CNTFREQ = 19200000; // Value from fusee.
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inline s64 msToCycles(int ms) {
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// since ms is int there is no way to overflow
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