dfgerdg
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main.c
53
main.c
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@ -6,32 +6,43 @@
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#include <stdbool.h>
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#include <stdbool.h>
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#include <avr/interrupt.h>
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#include <avr/interrupt.h>
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int tick_timer_start = 0xffff - (F_CPU / 1024); // 1 second
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volatile int debounce_int2 = 10;
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volatile int debounce_int3 = 10;
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void start_timer() {
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ISR(INT2_vect) {
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TCCR1B |= _BV(CS10) | _BV(CS12); // clk/1024
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if (debounce_int2) return;
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debounce_int2 = 100;
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// Set the TOIE (Timer Overflow Interrupt Enable) bit
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OCR0A++;
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// on TIMSK1 (Timer 1 Interrupt Mask Register).
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TIMSK1 |= _BV(TOIE1);
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// Sets the current timer value
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TCNT1 = tick_timer_start;
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// Enable interrupts
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sei();
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}
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}
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// ISR is used to handle interrupts. TIMER1_OVF_vect
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ISR(INT3_vect) {
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// is triggered whenever timer 1 (16 bit) overflows.
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if (debounce_int3) return;
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ISR(TIMER1_OVF_vect) {
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debounce_int3 = 100;
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TCNT1 = tick_timer_start;
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OCR0A--;
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PORTB ^= 0b10000000;
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}
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ISR(TIMER0_COMPA_vect) {
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PORTF ^= 0b00000001;
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}
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}
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void main() {
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void main() {
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DDRB = 0b10000000;
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DDRF = 0b00000001;
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DDRD = 0b00000000;
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PORTD |= 0b00001100;
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start_timer();
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// EIMSK controls which ports can trigger interrupts
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while(1);
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EIMSK |= _BV(INT2) | _BV(INT3);
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// Trigger on falling edge on INT2 and INT3
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EICRA |= _BV(ISC21) | _BV(ISC31);
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TCCR0B |= _BV(CS00) | _BV(CS02); // clk/1024
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TIMSK0 |= _BV(OCIE0A);
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OCR0A = 0;
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sei();
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while(1) {
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_delay_ms(10);
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OCR0A++;
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}
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}
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}
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