LDj3SNuD ffbfbb5549 Add FCVT <Hd>, <Sn> and FCVT <Sd>, <Hn> Inst.; add Tests. (#692) ... * Update OpCodeTable.cs * Update InstEmitSimdCvt.cs * Update CpuTestSimd.cs * Address PR feedback.		2019-05-30 19:51:39 -03:00
..
CpuTest.cs	Add Tbl_V Sse opt. with Tests. (#651)	2019-03-23 15:50:19 -03:00
CpuTestAlu.cs
CpuTestAluImm.cs
CpuTestAluRs.cs
CpuTestAluRx.cs
CpuTestBfm.cs
CpuTestCcmpImm.cs
CpuTestCcmpReg.cs
CpuTestCsel.cs
CpuTestMisc.cs
CpuTestMov.cs
CpuTestMul.cs
CpuTestSimd.cs	Add FCVT <Hd>, <Sn> and FCVT <Sd>, <Hn> Inst.; add Tests. (#692)	2019-05-30 19:51:39 -03:00
CpuTestSimdCrypto.cs
CpuTestSimdCvt.cs	Sse optimized the 32-bit Vector & Scalar integer-to-fp conversion instructions (signed & unsigned); added the related Gp & V_Fixed Tests (signed & unsigned). (#662)	2019-04-20 23:07:35 -03:00
CpuTestSimdExt.cs	Add Rshrn_V & Shrn_V Sse opt.. Add Mla_V, Mls_V & Mul_V Sse opt.; add Tests. (#614)	2019-03-13 19:23:52 +11:00
CpuTestSimdFcond.cs
CpuTestSimdImm.cs
CpuTestSimdIns.cs	Add Rshrn_V & Shrn_V Sse opt.. Add Mla_V, Mls_V & Mul_V Sse opt.; add Tests. (#614)	2019-03-13 19:23:52 +11:00
CpuTestSimdReg.cs	Add Rshrn_V & Shrn_V Sse opt.. Add Mla_V, Mls_V & Mul_V Sse opt.; add Tests. (#614)	2019-03-13 19:23:52 +11:00
CpuTestSimdRegElem.cs
CpuTestSimdRegElemF.cs
CpuTestSimdShImm.cs	Sse optimized the 32-bit Vector & Scalar integer-to-fp conversion instructions (signed & unsigned); added the related Gp & V_Fixed Tests (signed & unsigned). (#662)	2019-04-20 23:07:35 -03:00
CpuTestSimdTbl.cs	Add Tbl_V Sse opt. with Tests. (#651)	2019-03-23 15:50:19 -03:00