mirror of
https://github.com/Ryujinx/Ryujinx.git
synced 2024-09-13 15:05:12 +00:00
17620d18db
* ARMeilleure: Add AVX512{F,VL,DQ,BW} detection
Add `UseAvx512Ortho` and `UseAvx512OrthoFloat` optimization flags as
short-hands for `F+VL` and `F+VL+DQ`.
* ARMeilleure: Add initial support for EVEX instruction encoding
Does not implement rounding, or exception controls.
* ARMeilleure: Add `X86Vpternlogd`
Accelerates the vector-`Not` instruction.
* ARMeilleure: Add check for `OSXSAVE` for AVX{2,512}
* ARMeilleure: Add check for `XCR0` flags
Add XCR0 register checks for AVX and AVX512F, following the guidelines
from section 14.3 and 15.2 from the Intel Architecture Software
Developer's Manual.
* ARMeilleure: Remove redundant `ReProtect` and `Dispose`, formatting
* ARMeilleure: Move XCR0 procedure to GetXcr0Eax
* ARMeilleure: Add `XCR0` to `FeatureInfo` structure
* ARMeilleure: Utilize `ReadOnlySpan` for Xcr0 assembly
Avoids an additional allocation
* ARMeilleure: Formatting fixes
* ARMeilleure: Fix EVEX encoding src2 register index
> Just like in VEX prefix, vvvv is provided in inverted form.
* ARMeilleure: Add `X86Vpternlogd` acceleration to `Vmvn_I`
Passes unit tests, verified instruction utilization
* ARMeilleure: Fix EVEX register operand designations
Operand 2 was being sourced improperly.
EVEX encoded instructions source their operands like so:
Operand 1: ModRM:reg
Operand 2: EVEX.vvvvv
Operand 3: ModRM:r/m
Operand 4: Imm
This fixes the improper register designations when emitting vpternlog.
Now "dest", "src1", "src2" arguments emit in the proper order in EVEX instructions.
* ARMeilleure: Add `X86Vpternlogd` acceleration to `Orn_V`
* ARMeilleure: PTC version bump
* ARMeilleure: Update EVEX encoding Debug.Assert to Debug.Fail
* ARMeilleure: Update EVEX encoding comment capitalization
|
||
|---|---|---|
| .. | ||
| CryptoHelper.cs | ||
| InstEmitAlu.cs | ||
| InstEmitAlu32.cs | ||
| InstEmitAluHelper.cs | ||
| InstEmitBfm.cs | ||
| InstEmitCcmp.cs | ||
| InstEmitCsel.cs | ||
| InstEmitDiv.cs | ||
| InstEmitException.cs | ||
| InstEmitException32.cs | ||
| InstEmitFlow.cs | ||
| InstEmitFlow32.cs | ||
| InstEmitFlowHelper.cs | ||
| InstEmitHash.cs | ||
| InstEmitHash32.cs | ||
| InstEmitHashHelper.cs | ||
| InstEmitHelper.cs | ||
| InstEmitMemory.cs | ||
| InstEmitMemory32.cs | ||
| InstEmitMemoryEx.cs | ||
| InstEmitMemoryEx32.cs | ||
| InstEmitMemoryExHelper.cs | ||
| InstEmitMemoryHelper.cs | ||
| InstEmitMove.cs | ||
| InstEmitMul.cs | ||
| InstEmitMul32.cs | ||
| InstEmitSimdArithmetic.cs | ||
| InstEmitSimdArithmetic32.cs | ||
| InstEmitSimdCmp.cs | ||
| InstEmitSimdCmp32.cs | ||
| InstEmitSimdCrypto.cs | ||
| InstEmitSimdCrypto32.cs | ||
| InstEmitSimdCvt.cs | ||
| InstEmitSimdCvt32.cs | ||
| InstEmitSimdHash.cs | ||
| InstEmitSimdHash32.cs | ||
| InstEmitSimdHashHelper.cs | ||
| InstEmitSimdHelper.cs | ||
| InstEmitSimdHelper32.cs | ||
| InstEmitSimdHelper32Arm64.cs | ||
| InstEmitSimdHelperArm64.cs | ||
| InstEmitSimdLogical.cs | ||
| InstEmitSimdLogical32.cs | ||
| InstEmitSimdMemory.cs | ||
| InstEmitSimdMemory32.cs | ||
| InstEmitSimdMove.cs | ||
| InstEmitSimdMove32.cs | ||
| InstEmitSimdShift.cs | ||
| InstEmitSimdShift32.cs | ||
| InstEmitSystem.cs | ||
| InstEmitSystem32.cs | ||
| InstName.cs | ||
| NativeInterface.cs | ||
| SoftFallback.cs | ||
| SoftFloat.cs | ||