.. |
CryptoHelper.cs
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Add Smlal_Ve, Smlsl_Ve, Smull_Ve, Umlal_Ve, Umlsl_Ve, Umull_Ve Inst.; add Tests. Add Sse Opt. for Trn1/2_V and Uzp1/2_V Inst. Nits. (#566)
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2019-01-29 10:54:39 -03:00 |
Inst.cs
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Add ARM32 support on the translator (#561)
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2019-01-24 23:59:53 -02:00 |
InstEmit32Helper.cs
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Refactoring and optimization on CPU translation (#661)
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2019-04-26 14:55:12 +10:00 |
InstEmitAlu.cs
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Refactoring and optimization on CPU translation (#661)
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2019-04-26 14:55:12 +10:00 |
InstEmitAlu32.cs
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Refactoring and optimization on CPU translation (#661)
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2019-04-26 14:55:12 +10:00 |
InstEmitAluHelper.cs
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Implement some ARM32 memory instructions and CMP (#565)
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2019-01-29 13:06:11 -03:00 |
InstEmitBfm.cs
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Optmize BFM instruction (#607)
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2019-02-26 20:16:50 +11:00 |
InstEmitCcmp.cs
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Refactoring and optimization on CPU translation (#661)
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2019-04-26 14:55:12 +10:00 |
InstEmitCsel.cs
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Refactoring and optimization on CPU translation (#661)
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2019-04-26 14:55:12 +10:00 |
InstEmitException.cs
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Refactoring and optimization on CPU translation (#661)
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2019-04-26 14:55:12 +10:00 |
InstEmitFlow.cs
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Refactoring and optimization on CPU translation (#661)
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2019-04-26 14:55:12 +10:00 |
InstEmitFlow32.cs
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Refactoring and optimization on CPU translation (#661)
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2019-04-26 14:55:12 +10:00 |
InstEmitFlowHelper.cs
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Refactoring and optimization on CPU translation (#661)
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2019-04-26 14:55:12 +10:00 |
InstEmitHash.cs
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Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484)
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2018-10-30 22:43:02 -03:00 |
InstEmitMemory.cs
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Optimize address translation and write tracking on the MMU (#571)
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2019-02-24 18:24:35 +11:00 |
InstEmitMemory32.cs
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Refactoring and optimization on CPU translation (#661)
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2019-04-26 14:55:12 +10:00 |
InstEmitMemoryEx.cs
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Refactoring and optimization on CPU translation (#661)
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2019-04-26 14:55:12 +10:00 |
InstEmitMemoryHelper.cs
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Refactoring and optimization on CPU translation (#661)
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2019-04-26 14:55:12 +10:00 |
InstEmitMove.cs
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Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484)
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2018-10-30 22:43:02 -03:00 |
InstEmitMul.cs
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Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484)
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2018-10-30 22:43:02 -03:00 |
InstEmitSimdArithmetic.cs
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Add Smaxv_V, Sminv_V, Umaxv_V, Uminv_V Inst.; add Tests. (#691)
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2019-05-29 21:29:24 -03:00 |
InstEmitSimdCmp.cs
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Refactoring and optimization on CPU translation (#661)
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2019-04-26 14:55:12 +10:00 |
InstEmitSimdCrypto.cs
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Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484)
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2018-10-30 22:43:02 -03:00 |
InstEmitSimdCvt.cs
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Add FCVT <Hd>, <Sn> and FCVT <Sd>, <Hn> Inst.; add Tests. (#692)
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2019-05-30 19:51:39 -03:00 |
InstEmitSimdHash.cs
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Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484)
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2018-10-30 22:43:02 -03:00 |
InstEmitSimdHelper.cs
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Add Smaxv_V, Sminv_V, Umaxv_V, Uminv_V Inst.; add Tests. (#691)
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2019-05-29 21:29:24 -03:00 |
InstEmitSimdLogical.cs
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Add Cmeq_V, Cmge_V, Cmgt_V, Cmle_V & Cmlt_V (Z & ~Z) Sse opt.. (#646)
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2019-03-25 10:23:27 +11:00 |
InstEmitSimdMemory.cs
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Optimize address translation and write tracking on the MMU (#571)
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2019-02-24 18:24:35 +11:00 |
InstEmitSimdMove.cs
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Refactoring and optimization on CPU translation (#661)
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2019-04-26 14:55:12 +10:00 |
InstEmitSimdShift.cs
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Add Rshrn_V & Shrn_V Sse opt.. Add Mla_V, Mls_V & Mul_V Sse opt.; add Tests. (#614)
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2019-03-13 19:23:52 +11:00 |
InstEmitSystem.cs
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Optimize address translation and write tracking on the MMU (#571)
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2019-02-24 18:24:35 +11:00 |
InstEmitter.cs
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Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484)
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2018-10-30 22:43:02 -03:00 |
SoftFallback.cs
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Add Smlal_Ve, Smlsl_Ve, Smull_Ve, Umlal_Ve, Umlsl_Ve, Umull_Ve Inst.; add Tests. Add Sse Opt. for Trn1/2_V and Uzp1/2_V Inst. Nits. (#566)
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2019-01-29 10:54:39 -03:00 |
SoftFloat.cs
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Add Smlal_Ve, Smlsl_Ve, Smull_Ve, Umlal_Ve, Umlsl_Ve, Umull_Ve Inst.; add Tests. Add Sse Opt. for Trn1/2_V and Uzp1/2_V Inst. Nits. (#566)
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2019-01-29 10:54:39 -03:00 |
VectorHelper.cs
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Sse optimized the Scalar & Vector fp-to-fp conversion instructions (MNPZ & IX); added the related Tests (AMNPZ & IX). Small refactoring of existing instructions. (#676)
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2019-04-26 08:58:29 +10:00 |